ADC12DJ3200EVM

ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling ADC evaluation module

ADC12DJ3200EVM

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Overview

The ADC12DJ3200 evaluation module (EVM) allows for the evaluation of device ADC12DJ3200. The ADC12DJ3200 is a low-power, 12-bit, dual 3.2-GSPS/single 6.4-GSPS, RF-sampling analog-to-digital converter (ADC) with a buffered analog input, integrated digital down converter with programmable NCO and decimation settings (including undecimated 12- and 8-bit ADC output), which features a JESD204B interface. The EVM has transformer-coupled analog inputs to accommodate a wide range of signal sources and frequencies. An LMX2582 clock synthesizer and LMK04828 JESD204B clock generator are included on the EVM and can be configured to provide an ultra-low-jitter ADC device clock and SYSREF for a complete JESD204B subclass 1 clocking solution.

ADC12DJ3200, LMX2582, and LMK04828 are controlled through an easy-to-use software GUI enabling quick configuration for a variety of uses.

The ADC12DJ3200EVM connects directly to TSW14J57EVM data capture hardware via the high-speed FMC+ connector.  High-Speed Data Converter Pro Software (DATACONVERTERPRO-SW) is also available for data capture and analysis support when using the TSW14J57EVM.

Features
  • Flexible transformer-coupled analog input to allow for a variety of sources and frequencies
  • Easy-to-use software GUI to configure ADC12DJ3200, LMX2582, and LMK04828 devices for a variety of configurations through a USB interface
  • Quickly evaluate ADC performance through High-Speed Data Converter Pro Software (DATACONVERTERPRO-SW)
  • Simple connection to TSW14J57EVM data capture card

  • ADC12DJ3200 EVM
  • Power cable
  • USB cable
  • FMC+ to FMC adapter

Clock jitter cleaners
LMK04828 Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.

 

High-speed ADCs (≥10 MSPS)
ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling analog-to-digital converter (ADC)

 

RF PLLs & synthesizers
LMX2582 5.5-GHz high performance, wideband PLLatinum RF synthesizer
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Get started

  1. Order the evaluation board - ADC12DJ3200EVM
  2. Order (if needed) the FPGA capture card - TSW14J57EVM
  3. Read the evaluation board user's guide
  4. Make sure you have or buy the necessary power supplies for both boards
  5. Download and install the GUI for the evaluation board
  6. Download and install HSDCPro software for the TSW14J57EVM capture card

Order & start development

Evaluation board

ADC12DJ3200EVM — ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling ADC evaluation module

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GUI for evaluation module (EVM)

SLAC745 — ADC12DJxx00 GUI

Supported products & hardware
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SLAC745 ADC12DJxx00 GUI

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Latest version
Version: 01.00.00.0A
Release date: 15 Jan 2018
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Products
High-speed ADCs (≥10 MSPS)
ADC08DJ3200 8-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling Analog-to-Digital Converter (ADC) ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling analog-to-digital converter (ADC)
Hardware development
Evaluation board
ADC08DJ3200EVM ADC08DJ3200 8-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling ADC Evaluation Module ADC12DJ2700EVM ADC12DJ2700 12-bit, dual 2.7-GSPS or single 5.4-GSPS, RF-sampling ADC evaluation module ADC12DJ3200EVM ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling ADC evaluation module

Release Infomation

The design resource accessed as www.ti.com/lit/zip/slac745 or www.ti.com/lit/xx/slac745a/slac745a.zip has been migrated to a new user experience at www.ti.com/tool/download/SLAC745. Please update any bookmarks accordingly.
Firmware

SLAC748 — Arria10 + ADC12DJ3200 JMODE0 Design Firmware

Supported products & hardware
Download

SLAC748 Arria10 + ADC12DJ3200 JMODE0 Design Firmware

close
Latest version
Version: 01.00.00.00
Release date: 24 May 2017
lock = Requires export approval (1 minute)
Products
High-speed ADCs (≥10 MSPS)
ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling analog-to-digital converter (ADC)
Hardware development
Evaluation board
ADC08DJ3200EVM ADC08DJ3200 8-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling ADC Evaluation Module ADC12DJ3200EVM ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling ADC evaluation module ADC12DJ3200EVMCVAL ADC12DJ3200QML-SP evaluation module

Release Infomation

The design resource accessed as www.ti.com/lit/zip/slac748 or www.ti.com/lit/xx/slac748/slac748.zip has been migrated to a new user experience at www.ti.com/tool/download/SLAC748. Please update any bookmarks accordingly.
Support software

SLVC696 — ADC12DJ3200EVM MATLAB Automation Software

Supported products & hardware
Download

SLVC696 ADC12DJ3200EVM MATLAB Automation Software

close
Latest version
Version: 01.00.00.00
Release date: 17 Aug 2017
lock = Requires export approval (1 minute)
Hardware development
Evaluation board
ADC08DJ3200EVM ADC08DJ3200 8-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling ADC Evaluation Module ADC12DJ2700EVM ADC12DJ2700 12-bit, dual 2.7-GSPS or single 5.4-GSPS, RF-sampling ADC evaluation module ADC12DJ3200EVM ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling ADC evaluation module ADC12DJ3200EVMCVAL ADC12DJ3200QML-SP evaluation module

Release Infomation

The design resource accessed as www.ti.com/lit/zip/slvc696 or www.ti.com/lit/xx/slvc696/slvc696.zip has been migrated to a new user experience at www.ti.com/tool/download/SLVC696. Please update any bookmarks accordingly.
Firmware

SLVC698 — Xilinx KCU105 + ADC12DJ3200 JMODE0/JMODE2 Design Firmware

Supported products & hardware
Download

SLVC698 Xilinx KCU105 + ADC12DJ3200 JMODE0/JMODE2 Design Firmware

close
Latest version
Version: 01.00.00.00
Release date: 29 Aug 2017
lock = Requires export approval (1 minute)
Products
High-speed ADCs (≥10 MSPS)
ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling analog-to-digital converter (ADC)
Hardware development
Evaluation board
ADC08DJ3200EVM ADC08DJ3200 8-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling ADC Evaluation Module ADC12DJ3200EVM ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling ADC evaluation module ADC12DJ3200EVMCVAL ADC12DJ3200QML-SP evaluation module

Release Infomation

The design resource accessed as www.ti.com/lit/zip/slvc698 or www.ti.com/lit/xx/slvc698/slvc698.zip has been migrated to a new user experience at www.ti.com/tool/download/SLVC698. Please update any bookmarks accordingly.
TI's Standard Terms and Conditions for Evaluation Items apply.

Design files

Technical documentation

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Type Title Date
* EVM User's guide ADCxxDJxx00 Evaluation Module User's Guide (Rev. A) 09 Jan 2018
Data sheet ADC12DJ3200 6.4-GSPS Single-Channel or 3.2-GSPS Dual-Channel, 12-bit, RF-Sampling Analog-to-Digital Converter (ADC) datasheet (Rev. A) PDF | HTML 21 Feb 2019
Certificate ADC12DJ3200EVM EU Declaration of Conformity (DoC) 02 Jan 2019
Technical article Preparing for 5G applications: sync your multichannel JESD204B data acquisition sy PDF | HTML 28 Aug 2017
Technical article High-speed data converter clocking for JESD204B PDF | HTML 07 Jul 2017

Related design resources

Hardware development

EVALUATION BOARD
TSW14J57EVM Data capture/pattern generator: data converter EVM with 16 JESD204B lanes from 1.6-15Gbps

Software development

SUPPORT SOFTWARE
DATACONVERTERPRO-SW High-speed data converter pro software

Support & training

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