SBAS480C september   2009  – june 2023 ADS1000-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Timing Diagram
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog-to-Digital Converter
      2. 7.3.2 Clock Generator
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operating Modes
      2. 7.4.2 Reset and Power Up
    5. 7.5 Programming
      1. 7.5.1 I2C Interface
      2. 7.5.2 ADS1000-Q1 I2C Addresses
      3. 7.5.3 I2C General Call
      4. 7.5.4 I2C Data Rates
      5. 7.5.5 Output Code Calculation
    6. 7.6 Register Maps
      1. 7.6.1 Output Register
      2. 7.6.2 Configuration Register
      3. 7.6.3 Reading From the ADS1000-Q1
      4. 7.6.4 Writing to the ADS1000-Q1
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Connections
        1. 8.1.1.1 Connecting Multiple Devices
        2. 8.1.1.2 Using GPIO Ports For I2C
        3. 8.1.1.3 Single-Ended Inputs
    2. 8.2 Typical Applications
      1. 8.2.1 ADS1000-Q1 With Current-Shunt Monitor
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Part Selection
            1. 8.2.1.2.1.1 Gain Settings
            2. 8.2.1.2.1.2 Circuit Implementation
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Low-Side Current Measurement
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

all specifications at TA = –40°C to +125°C, VDD = 5 V, GND = 0 V, and all PGA gain settings (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUT
Differential input impedance 2.4 / PGA MΩ
Common-mode input impedance 8 MΩ
SYSTEM PERFORMANCE
Resolution No missing codes 12 Bits
Data rate 104 128 184 SPS
INL Integral nonlinearity ±0.1 1 LSB
Offset error 1 ±2 LSB
Gain error 0.01% 0.1%
DIGITAL INPUT/OUTPUT
Logic level
VIH Input voltage, high 0.7 VDD 6 V
VIL Input voltage, low GND – 0.5 0.3 VDD V
VOL Output voltage, low IOL = 3 mA GND 0.4 V
Input leakage
IIH Input current, high VIH = 5.5 V 10 μA
IIL Input current, low VIL = GND –10 μA
POWER SUPPLY
Supply current Power-down 0.05 2 μA
Active 90 150
Power dissipation VDD = 5 V 450 750 μW
VDD = 3 V 210