SBAS674A July   2014  – September 2016 ADS1148-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Noise Performance
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  ADC Input and Multiplexer
      2. 8.3.2  Low-Noise PGA
        1. 8.3.2.1 PGA Common-Mode Voltage Requirements
        2. 8.3.2.2 PGA Common-Mode Voltage Calculation Example
        3. 8.3.2.3 Analog Input Impedance
      3. 8.3.3  Clock Source
      4. 8.3.4  Modulator
      5. 8.3.5  Digital Filter
      6. 8.3.6  Voltage Reference Input
      7. 8.3.7  Internal Voltage Reference
      8. 8.3.8  Excitation Current Sources
      9. 8.3.9  Sensor Detection
      10. 8.3.10 Bias Voltage Generation
      11. 8.3.11 General-Purpose Digital I/O
      12. 8.3.12 System Monitor
        1. 8.3.12.1 Power-Supply Monitor
        2. 8.3.12.2 External Voltage Reference Monitor
        3. 8.3.12.3 Ambient Temperature Monitor
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power Up
      2. 8.4.2 Reset
      3. 8.4.3 Power-Down Mode
      4. 8.4.4 Conversion Control
        1. 8.4.4.1 Settling Time for Channel Multiplexing
        2. 8.4.4.2 Channel Cycling and Overload Recovery
        3. 8.4.4.3 Single-Cycle Settling
        4. 8.4.4.4 Digital Filter Reset Operation
      5. 8.4.5 Calibration
        1. 8.4.5.1 Offset Calibration Register: OFC[2:0]
        2. 8.4.5.2 Full-Scale Calibration Register: FSC[2:0]
        3. 8.4.5.3 Calibration Commands
          1. 8.4.5.3.1 System Offset and Self Offset Calibration
          2. 8.4.5.3.2 System Gain Calibration
        4. 8.4.5.4 Calibration Timing
    5. 8.5 Programming
      1. 8.5.1 Digital Interface
        1. 8.5.1.1 Chip Select (CS)
        2. 8.5.1.2 Serial Clock (SCLK)
        3. 8.5.1.3 Data Input (DIN)
        4. 8.5.1.4 Data Ready (DRDY)
        5. 8.5.1.5 Data Output and Data Ready (DOUT/DRDY)
        6. 8.5.1.6 SPI Reset
        7. 8.5.1.7 SPI Communication During Power-Down Mode
      2. 8.5.2 Data Format
      3. 8.5.3 Commands
        1. 8.5.3.1  WAKEUP (0000 000x)
        2. 8.5.3.2  SLEEP (0000 001x)
        3. 8.5.3.3  SYNC (0000 010x)
        4. 8.5.3.4  RESET (0000 011x)
        5. 8.5.3.5  RDATA (0001 001x)
        6. 8.5.3.6  RDATAC (0001 010x)
        7. 8.5.3.7  SDATAC (0001 011x)
        8. 8.5.3.8  RREG (0010 rrrr, 0000 nnnn)
        9. 8.5.3.9  WREG (0100 rrrr, 0000 nnnn)
        10. 8.5.3.10 SYSOCAL (0110 0000)
        11. 8.5.3.11 SYSGCAL (0110 0001)
        12. 8.5.3.12 SELFOCAL (0110 0010)
        13. 8.5.3.13 NOP (1111 1111)
        14. 8.5.3.14 Restricted Command (1111 0001)
    6. 8.6 Register Maps
      1. 8.6.1 Register Map
      2. 8.6.2 Detailed Register Definitions
        1. 8.6.2.1  MUX0—Multiplexer Control Register 0 (address = 00h) [reset = 01h]
        2. 8.6.2.2  VBIAS—Bias Voltage Register (address = 01h) [reset = 00h]
        3. 8.6.2.3  MUX1—Multiplexer Control Register 1 (address = 02h) [reset = x0h]
        4. 8.6.2.4  SYS0—System Control Register 0 (address = 03h) [reset = 00h]
        5. 8.6.2.5  OFC—Offset Calibration Coefficient Register (address = 04h, 05h, 06h) [reset = 00h, 00h, 00h]
        6. 8.6.2.6  FSC—Full-Scale Calibration Coefficient Register (address = 07h, 08h, 09h) [reset = 00h, 00h, 40h]
        7. 8.6.2.7  IDAC0—IDAC Control Register 0 (address = 0Ah) [reset = x0h]
        8. 8.6.2.8  IDAC1—IDAC Control Register 1 (address = 0Bh) [reset = FFh]
        9. 8.6.2.9  GPIOCFG—GPIO Configuration Register (address = 0Ch) [reset = 00h]
        10. 8.6.2.10 GPIODIR—GPIO Direction Register (address = 0Dh) [reset = 00h]
        11. 8.6.2.11 GPIODAT—GPIO Data Register (address = 0Eh) [reset = 00h]
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Serial Interface Connections
      2. 9.1.2 Analog Input Filtering
      3. 9.1.3 External Reference and Ratiometric Measurements
      4. 9.1.4 Establishing a Proper Common-Mode Input Voltage
      5. 9.1.5 Isolated (or Floating) Sensor Inputs
      6. 9.1.6 Unused Inputs and Outputs
      7. 9.1.7 Pseudo Code Example
      8. 9.1.8 Channel Multiplexing Example
      9. 9.1.9 Power-Down Mode Example
    2. 9.2 Typical Applications
      1. 9.2.1 Ratiometric 3-Wire RTD Measurement System
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Topology
          2. 9.2.1.2.2 RTD Selection
          3. 9.2.1.2.3 Excitation Current
          4. 9.2.1.2.4 Reference Resistor (RREF)
          5. 9.2.1.2.5 PGA Setting
          6. 9.2.1.2.6 Common-Mode Input Range
          7. 9.2.1.2.7 Input and Reference Low-Pass Filters
          8. 9.2.1.2.8 Register Settings
        3. 9.2.1.3 Application Curves
      2. 9.2.2 K-Type Thermocouple Measurement (-200°C to +1250°C) With Cold-Junction Compensation
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Biasing Resistors
          2. 9.2.2.2.2 Input Filtering
          3. 9.2.2.2.3 PGA Setting
          4. 9.2.2.2.4 Cold-Junction Measurement
          5. 9.2.2.2.5 Calculated Resolution
          6. 9.2.2.2.6 Register Settings
    3. 9.3 Do's and Don'ts
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Sequencing
    2. 10.2 Power Supply Decoupling
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified with the Following Results:
    • Temperature Grade 1: –40°C to +125°C
    • HBM ESD Classification 2
    • CDM ESD Classification C5
  • Programmable Gain: 1 V/V to 128 V/V
  • Programmable Data Rates: 5 SPS to 2 kSPS
  • Single-Cycle Settling for All Data Rates
  • Analog Multiplexer With 8 Independently Selectable Inputs
  • Dual-Matched Programmable Excitation Current Sources: 50 µA to 1.5 mA
  • Internal 2.048-V Voltage Reference
  • Internal 4.096-MHz Oscillator
  • Internal Temperature Sensor
  • Open Sensor Detection
  • Power-Supply and External Reference Monitoring
  • Self and System Calibration
  • 8 General-Purpose I/Os
  • SPI-Compatible Serial Interface
  • Analog Supply: Unipolar (2.7 V to 5.25 V) or
    Bipolar (±2.5 V)
  • Digital Supply: 2.7 V to 5.25 V

2 Applications

  • Thermocouple-, RTD- and Thermistor-
    Based Temperature Measurement Systems
  • Exhaust Gas Sensing (Soot, NOx, NH3, O2)
  • Battery Management Systems (BMS)
  • Multichannel Voltage and Current Monitoring

3 Description

The ADS1148-Q1 is a highly-integrated, precision, 16-bit analog-to-digital converter (ADC) that includes many integrated features to reduce system cost and component count for sensor measurement applications. The device features a low-noise, programmable gain amplifier (PGA), a precision delta-sigma (ΔΣ) ADC with a single-cycle settling digital filter, and an internal oscillator. The
ADS1148-Q1 integrates a low-drift voltage reference, and two matched programmable excitation current sources (IDACs).

The device offers a fully flexible multiplexer that allows both positive and negative inputs to be selected independently. In addition, the multiplexer integrates sensor burn-out detection, voltage bias for thermocouples, system monitoring, and eight general-purpose digital I/Os (GPIOs). The PGA provides selectable gains up to 128 V/V. These features provide a complete front-end solution for temperature sensor measurement applications, including thermocouples, thermistors, and resistance temperature detectors (RTDs), and other small-signal measurements. The digital filter settles in a single cycle to support fast channel cycling when using the input multiplexer and provides data rates up to 2 kSPS. For data rates of 20 SPS or less, both the 50-Hz and 60-Hz interference are rejected by the filter.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
ADS1148-Q1 TSSOP (28) 9.70 mm × 4.40 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Functional Block Diagram

ADS1148-Q1 alt_sbas674.gif