Figure 30 shows a simplified block diagram of the ADS1291, ADS1292, and ADS1292R internal reference. The reference voltage is generated with respect to AVSS. The VREFN pin must always be connected to AVSS.
The external band-limiting capacitors determine the amount of reference noise contribution. For high-end ECG systems, the capacitor values should be chosen such that the bandwidth is limited to less than 10 Hz so that the reference noise does not dominate the system noise. When using a 3-V analog supply, the internal reference must be set to 2.42 V. In case of a 5-V analog supply, the internal reference can be set to 4.033 V by setting the VREF_4V bit in the CONFIG2 register.
Alternatively, the internal reference buffer can be powered down and VREFP can be applied externally. Figure 31 shows a typical external reference drive circuitry. Power-down is controlled by the PD_REFBUF bit in the CONFIG2 register. This power-down is also used to share internal references when two devices are cascaded. By default the device wakes up in external reference mode.