SBASAN5A July   2023  – May 2025 AFE7955

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  ESD Ratings
    3. 4.3  Recommended Operating Conditions
    4. 4.4  Thermal Information AFE79xx
    5. 4.5  Transmitter Electrical Characteristics
    6. 4.6  RF ADC Electrical Characteristics
    7. 4.7  PLL/VCO/Clock Electrical Characteristics
    8. 4.8  Digital Electrical Characteristics
    9. 4.9  Power Supply Electrical Characteristics
    10. 4.10 Timing Requirements
    11. 4.11 Switching Characteristics
    12. 4.12 Typical Characteristics
      1. 4.12.1  TX Typical Characteristics 800 MHz
      2. 4.12.2  TX Typical Characteristics at 1.8 GHz
      3. 4.12.3  TX Typical Characteristics at 2.6 GHz
      4. 4.12.4  TX Typical Characteristics at 3.5 GHz
      5. 4.12.5  TX Typical Characteristics at 4.9 GHz
      6. 4.12.6  TX Typical Characteristics at 8.1 GHz
      7. 4.12.7  TX Typical Characteristics at 9.6 GHz
      8. 4.12.8  RX Typical Characteristics at 800 MHz
      9. 4.12.9  RX Typical Characteristics at 1.75-1.9 GHz
      10. 4.12.10 RX Typical Characteristics at 2.6 GHz
      11. 4.12.11 RX Typical Characteristics at 3.5 GHz
      12. 4.12.12 RX Typical Characteristics at 4.9 GHz
      13. 4.12.13 RX Typical Characteristics at 8.1GHz
      14. 4.12.14 RX Typical Characteristics at 9.6 GHz
      15. 4.12.15 PLL and Clock Typical Characteristics
  6. 5Device and Documentation Support
    1. 5.1 Receiving Notification of Documentation Updates
    2. 5.2 Support Resources
    3. 5.3 Trademarks
    4. 5.4 Electrostatic Discharge Caution
    5. 5.5 Glossary
  7. 6Revision History
  8. 7Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4.12.12 RX Typical Characteristics at 4.9 GHz

Typical values at TA = +25°C, ADC Sampling Rate = 2949.12 GHz. Default conditions: output sample rate = 491.52 MSPS (decimate by 6), PLL clock mode with fREF = 491.52 MHz, AIN = –3 dBFS, DSA setting = 4 dB.

AFE7955 RX Inband Gain Flatness, fIN = 4900 MHz
With matching, normalized to power at 4.9GHz for each DSA setting
Figure 4-393 RX Inband Gain Flatness, fIN = 4900 MHz
AFE7955 RX Input Phase vs Temperature and DSA at fOUT = 4.9 GHz
With 4.9 GHz matching, normalized to phase at 25°C
Figure 4-395 RX Input Phase vs Temperature and DSA at fOUT = 4.9 GHz
AFE7955 RX Calibrated Differential Amplitude Error vs DSA Setting at 4.9 GHz
With 4.9 GHz matching
Differential Amplitude Error = PIN(DSA Setting – 1) – PIN(DSA Setting) + 1
Figure 4-397 RX Calibrated Differential Amplitude Error vs DSA Setting at 4.9 GHz
AFE7955 RX Calibrated Integrated Amplitude Error vs DSA Setting at 4.9 GHz
With 4.9 GHz matching
Integrated Amplitude Error = PIN(DSA Setting) – PIN(DSA Setting = 0) + (DSA Setting)
Figure 4-399 RX Calibrated Integrated Amplitude Error vs DSA Setting at 4.9 GHz
AFE7955 RX Calibrated Differential Phase Error vs DSA Setting at 4.9 GHz
With 4.9 GHz matching
Differential Phase Error = PhaseIN(DSA Setting – 1) – PhaseIN(DSA Setting)
Figure 4-401 RX Calibrated Differential Phase Error vs DSA Setting at 4.9 GHz
AFE7955 RX Calibrated Integrated Phase Error vs DSA Setting at 4.9 GHz
With 4.9 GHz matching
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 4-403 RX Calibrated Integrated Phase Error vs DSA Setting at 4.9 GHz
AFE7955 RX Noise Spectral Density vs Temperature at 4.9 GHz
With 4.9 GHz matching, 12.5-MHz offset from tone
Figure 4-405 RX Noise Spectral Density vs Temperature at 4.9 GHz
AFE7955 RX Noise Spectral Density vs Input Amplitude and Channel at 4.9 GHz
With 4.9 GHz matching, 12.5-MHz offset from tone
Figure 4-407 RX Noise Spectral Density vs Input Amplitude and Channel at 4.9 GHz
AFE7955 RX IMD3 vs Input Level and Temperature at 4.9 GHz
With 4.9 GHz matching, tone spacing = 20 MHz, DSA = 4 dB
Figure 4-409 RX IMD3 vs Input Level and Temperature at 4.9 GHz
AFE7955 RX HD2 vs DSA Setting and Channel at 4.9 GHz
With 4.9 GHz matching, measured after HD2 trim, DDC bypass mode (TI only mode for characterization)
Figure 4-411 RX HD2 vs DSA Setting and Channel at 4.9 GHz
AFE7955 RX HD2 vs Input Level and Temperature at 4.9 GHz
With 4.9 GHz matching, measured after HD2 trim, DDC bypass mode (TI only mode for characterization)
Figure 4-413 RX HD2 vs Input Level and Temperature at 4.9 GHz
AFE7955 RX HD3 vs DSA Setting and Temperature at 4.9 GHz
With 4.9 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 4-415 RX HD3 vs DSA Setting and Temperature at 4.9 GHz
AFE7955 RX HD3 vs Input Level and Temperature at 4.9 GHz
With 4.9 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 4-417 RX HD3 vs Input Level and Temperature at 4.9 GHz
AFE7955 RX Non-HD2/3 vs DSA Setting at 4.9 GHz
With 4.9 GHz matching
Figure 4-419 RX Non-HD2/3 vs DSA Setting at 4.9 GHz
AFE7955 RX Noise Spectral Density vs Supply and Channel at 4.9 GHz
With 4.9 GHz matching, 12.5-MHz offset, all supplies at MIN, TYP, or MAX recommended operating voltages
Figure 4-421 RX Noise Spectral Density vs Supply and Channel at 4.9 GHz
AFE7955 RX Input Fullscale vs Temperature and Channel at 4.9 GHz
With 4.9 GHz matching, normalized to fullscale at 25°C for each channel
Figure 4-394 RX Input Fullscale vs Temperature and Channel at 4.9 GHz
AFE7955 RX Uncalibrated Differential Amplitude Error vs DSA Setting at 4.9 GHz
With 4.9 GHz matching
Differential Amplitude Error = PIN(DSA Setting – 1) – PIN(DSA Setting) + 1
Figure 4-396 RX Uncalibrated Differential Amplitude Error vs DSA Setting at 4.9 GHz
AFE7955 RX Uncalibrated Integrated Amplitude Error vs DSA Setting at 4.9 GHz
With 4.9 GHz matching
Integrated Amplitude Error = PIN(DSA Setting) – PIN(DSA Setting = 0) + (DSA Setting)
Figure 4-398 RX Uncalibrated Integrated Amplitude Error vs DSA Setting at 4.9 GHz
AFE7955 RX Uncalibrated Differential Phase Error vs DSA Setting at 4.9 GHz
With 4.9 GHz matching
Differential Phase Error = PhaseIN(DSA Setting – 1) – PhaseIN(DSA Setting)
Figure 4-400 RX Uncalibrated Differential Phase Error vs DSA Setting at 4.9 GHz
AFE7955 RX Uncalibrated Integrated Phase Error vs DSA Setting at 4.9 GHz
With 4.9 GHz matching
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 4-402 RX Uncalibrated Integrated Phase Error vs DSA Setting at 4.9 GHz
AFE7955 RX Output FFT at 4.9 GHz
With 4.9 GHz matching, fIN = 4910 MHz, AIN= –3 dBFS
Figure 4-404 RX Output FFT at 4.9 GHz
AFE7955 RX Noise Spectral Density vs Input Amplitude and Temperature at 4.9 GHz
With 4.9 GHz matching, DSA Setting = 12 dB, 12.5-MHz offset from tone
Figure 4-406 RX Noise Spectral Density vs Input Amplitude and Temperature at 4.9 GHz
AFE7955 RX IMD3 vs DSA Setting and Temperature at 4.9 GHz
With 4.9 GHz matching, each tone –7 dBFS, tone spacing = 20 MHz
Figure 4-408 RX IMD3 vs DSA Setting and Temperature at 4.9 GHz
AFE7955 RX IMD3 vs Input Level and Temperature at 4.9 GHz
With 4.9 GHz matching, tone spacing = 20 MHz, DSA = 12 dB
Figure 4-410 RX IMD3 vs Input Level and Temperature at 4.9 GHz
AFE7955 RX HD2 vs DSA and Temperature at 4.9 GHz
With 4.9 GHz matching, measured after HD2 trim, DDC bypass mode (TI only mode for characterization)
Figure 4-412 RX HD2 vs DSA and Temperature at 4.9 GHz
AFE7955 RX HD3 vs DSA Setting and Channel at 4.9 GHz
With 4.9 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 4-414 RX HD3 vs DSA Setting and Channel at 4.9 GHz
AFE7955 RX HD3 vs Input Level and Channel at 4.9 GHz
With 4.9 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 4-416 RX HD3 vs Input Level and Channel at 4.9 GHz
AFE7955 RX In-Band SFDR (±400 MHz) vs Input Amplitude and Channel at 4.9 GHz
With 4.9 GHz matching, decimate by 3
Figure 4-418 RX In-Band SFDR (±400 MHz) vs Input Amplitude and Channel at 4.9 GHz
AFE7955 RX IMD3 vs Supply and Channel at 4.9 GHz
With 4.9 GHz matching, –7 dBFS each tone, 20-MHz tone spacing, all supplies at MIN, TYP, or MAX recommended operating voltages
Figure 4-420 RX IMD3 vs Supply and Channel at 4.9 GHz