SBASAN5 july   2023 AFE7955

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Revision History
  6. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information AFE79xx
    5. 5.5  Transmitter Electrical Characteristics
    6. 5.6  RF ADC Electrical Characteristics
    7. 5.7  PLL/VCO/Clock Electrical Characteristics
    8. 5.8  Digital Electrical Characteristics
    9. 5.9  Power Supply Electrical Characteristics
    10. 5.10 Timing Requirements
    11. 5.11 Switching Characteristics
    12. 5.12 Typical Characteristics
      1. 5.12.1  TX Typical Characteristics 800 MHz
      2. 5.12.2  TX Typical Characteristics at 1.8 GHz
      3. 5.12.3  TX Typical Characteristics at 2.6 GHz
      4. 5.12.4  TX Typical Characteristics at 3.5 GHz
      5. 5.12.5  TX Typical Characteristics at 4.9 GHz
      6. 5.12.6  TX Typical Characteristics at 8.1 GHz
      7. 5.12.7  TX Typical Characteristics at 9.6 GHz
      8. 5.12.8  RX Typical Characteristics at 800 MHz
      9. 5.12.9  RX Typical Characteristics at 1.75-1.9 GHz
      10. 5.12.10 RX Typical Characteristics at 2.6 GHz
      11. 5.12.11 RX Typical Characteristics at 3.5 GHz
      12. 5.12.12 RX Typical Characteristics at 4.9 GHz
      13. 5.12.13 RX Typical Characteristics at 8.1GHz
      14. 5.12.14 RX Typical Characteristics at 9.6 GHz
      15. 5.12.15 PLL and Clock Typical Characteristics
  7. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Support Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  8. 7Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

TX Typical Characteristics at 3.5 GHz

Typical values at TA = +25°C with nominal supplies. Default conditions: TX input data rate = 491.52MSPS, fDAC = 11796.48 MSPS (24x interpolation), interleave mode, 1st Nyquist zone output, PLL clock mode with fREF = 491.52 MHz, AOUT = –1 dBFS, DSA = 0 dB, Sin(x)/x enabled, DSA calibrated

GUID-C35418C6-2ECD-48BE-ADAE-A731FF5CAD4B-low.gif
Aout = -0.5dFBS, 3.5 GHz Matching, included PCB and cable losses
Figure 5-118 TX Output Power vs Frequency
GUID-20220907-SS0I-F8ZX-M3B8-TRZTKNZ5V27Q-low.svg
3.5 GHz Matching, included PCB and cable losses
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 5-120 TX Uncalibrated Differential Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-20220907-SS0I-01DW-XZS4-CLDMJZR7B3G7-low.svg
3.5 GHz Matching, included PCB and cable losses
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 5-122 TX Uncalibrated Integrated Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-20220907-SS0I-XKMV-NHSR-ZFRWFSSBXJMC-low.svg
3.5 GHz Matching, included PCB and cable losses
Figure 5-124 TX Uncalibrated Differential Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-20220907-SS0I-MXGM-D7GP-WFZZJX8N1XLL-low.svg
3.5 GHz Matching, included PCB and cable losses
Figure 5-126 TX Uncalibrated Integrated Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-1440EC5C-DAE2-4EF2-8C60-DA944CE00094-low.gif
3.5 GHz Matching, 1TX
Figure 5-128 TX Uncalibrated Differential Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-A73E4E9E-43CD-4846-B4D6-00153B011CDD-low.gif
3.5 GHz Matching, 1TX
Figure 5-130 TX Uncalibrated Integrated Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-74E0471E-D13E-4340-B485-F8D77FB2F08F-low.gif
3.5 GHz Matching, 1TX
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 5-132 TX Uncalibrated Differential Phase Error vs DSA setting and Temperature at 3.5 GHz
GUID-21E913CB-1E30-4C43-88E5-68AAEFACA6CA-low.gif
3.5 GHz Matching, 1TX
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting=0)
Figure 5-134 TX Uncalibrated Integrated Phase Error vs DSA Setting and Temperature at 3.5 GHz
GUID-20220907-SS0I-HFQS-R4Z6-Z5PH3PDNFWZW-low.svg
fDAC = 11796.48 MSPS, interleave mode, matching at 3.5 GHz, Aout = –13 dBFS.
Figure 5-136 TX NSD vs DSA Setting at 3.5 GHz
GUID-20220907-SS0I-RPTC-HGDW-VKT7TRGWBL2D-low.svg
20-MHz tone spacing, 3.5 GHz Matching
Figure 5-138 TX IMD3 vs Digital Amplitude and Channel at 3.5 GHz
GUID-20220907-SS0I-7SBH-JZZT-HKZDRQPFJH4R-low.svg
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 5-140 TX 20-MHz LTE ACPR vs DSA Setting at 3.5 GHz
GUID-E88C21D2-5A24-450D-8B98-E283F2CE9875-low.svg
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 5-142 TX 20-MHz LTE ACPR vs Digital Level at 3.5 GHz
GUID-20220907-SS0I-CN0N-FKSN-XX988CZ8RKTV-low.svg
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode, normalized to output power at harmonic frequency
Figure 5-144 TX Single Tone HD2 vs Frequency and Digital Level at 3.5 GHz
GUID-7A741ED1-77C5-4DAE-ACF2-D1591EB846FA-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 5-146 TX Single Tone (–1 dBFS) Output Spectrum at 3.5 GHz (0 - fDAC)
GUID-CC88C5D7-8BBA-4CB0-B3DD-E153E311B2F3-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 5-148 TX Single Tone (–12 dBFS) Output Spectrum at 3.5 GHz (0-fDAC)
GUID-20220907-SS0I-8KV7-WG51-W5NL6FB5SZVX-low.svg
Aout = -0.5 dFBS, 3.5 GHz Matching, included PCB and cable losses
Figure 5-119 TX Output Power vs DSA Setting at 3.5 GHz
GUID-20220907-SS0I-D4ZL-MTJP-B4MS12HF9WNB-low.svg
3.5 GHz Matching, included PCB and cable losses
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 5-121 TX Calibrated Differential Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-20220907-SS0I-QK9X-6W6K-DWDLNVZCDJLP-low.svg
3.5 GHz Matching, included PCB and cable losses
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 5-123 TX Calibrated Integrated Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-20220907-SS0I-L0SL-NVB9-VDVSMNSBTX39-low.svg
3.5 GHz Matching, included PCB and cable losses
Phase DNL spike may occur at any DSA setting.
Figure 5-125 TX Calibrated Differential Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-20220907-SS0I-RKCC-JX5Z-FJS2H1HZ7HVN-low.svg
3.5 GHz Matching, included PCB and cable losses
Figure 5-127 TX Calibrated Integrated Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-4C5265A3-4173-4239-B9A4-155437E6B5FC-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Figure 5-129 TX Calibrated Differential Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-AB870033-A532-40E7-878D-096ABD61E1C4-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Figure 5-131 TX Calibrated Integrated Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-7B0C6DF3-4B73-4818-96A2-E098829B946E-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 5-133 TX Calibrated Differential Phase Error vs DSA Setting and Temperature at 3.5 GHz
GUID-2A05E41A-2729-4BC2-AC1C-70026B1B6A30-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 5-135 TX Calibrated Integrated Phase Error vs DSA Setting and Temperature at 3.5 GHz
GUID-20220907-SS0I-NNXM-J8K3-PWB9K6CTJH9F-low.svg
20-MHz tone spacing, 3.5 GHz Matching, –13 dBFS each tone, included PCB and cable losses
Figure 5-137 TX IMD3 vs DSA Setting at 3.5 GHz
GUID-75B678B8-7BE3-4EA1-9B44-69CCE11D1E4A-low.gif
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 5-139 TX 20-MHz LTE Output Spectrum at 3.5 GHz (Band 42)
GUID-20220907-SS0I-SL12-QSNQ-7CKQJBGRNV4B-low.svg
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 5-141 TX 20-MHz LTE alt-ACPR vs DSA Setting at 3.5 GHz
GUID-20220907-SS0I-2ZF0-HKZM-VC7PLPJ4QBSL-low.svg
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 5-143 TX 20-MHz LTE alt-ACPR vs Digital Level at 3.5 GHz
GUID-20220907-SS0I-DWXB-W1DG-J8G3NGW2G6QM-low.svg
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode, normalized to output power at harmonic frequency. Dip is due to HD3 falling near DC.
Figure 5-145 TX Single Tone HD3 vs Frequency and Digital Level at 3.5 GHz
GUID-698B9F16-5516-4515-ABEF-1579358CA001-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 5-147 TX Single Tone (–6 dBFS) Output Spectrum at 3.5 GHz (0-fDAC)