SBASAY6A December   2024  – May 2025 AMC0236 , AMC0336

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information (D Package)
    5. 6.5  Thermal Information (DWV Package)
    6. 6.6  Power Ratings 
    7. 6.7  Insulation Specifications (Basic Isolation)
    8. 6.8  Insulation Specifications (Reinforced Isolation)
    9. 6.9  Safety-Related Certifications (Basic Isolation)
    10. 6.10 Safety-Related Certifications (Reinforced Isolation)
    11. 6.11 Safety Limiting Values (D Package)
    12. 6.12 Safety Limiting Values (DWV Package)
    13. 6.13 Electrical Characteristics
    14. 6.14 Switching Characteristics
    15. 6.15 Timing Diagrams
    16. 6.16 Insulation Characteristics Curves
    17. 6.17 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Modulator
      3. 7.3.3 Isolation Channel Signal Transmission
      4. 7.3.4 Digital Output
        1. 7.3.4.1 Output Behavior in Case of a Full-Scale Input
        2. 7.3.4.2 Output Behavior in Case of a Missing High-Side Supply
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Filter Design
        2. 8.2.2.2 Bitstream Filtering
      3. 8.2.3 Application Curve
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.13 Electrical Characteristics

minimum and maximum specifications apply from TA = –40°C to +125°C, AVDD = 3.0V to 5.5V, DVDD = 2.7V to 5.5V, VINP = –1V to +1V, and SNSN = AGND; typical specifications are at TA = 25°C, AVDD = 5V, DVDD = 3.3V, and fCLKIN = 10MHz (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUT
CIN Input capacitance fCLKIN = 10MHz 2 pF
RIN Input resistance INP pin to AGND, SNSN = AGND 0.05 2.4 GΩ
IIB Input bias current(1) INP pin, INP = AGND –10 ±3 10 nA
CMTI Common-mode transient immunity 150 V/ns
DC ACCURACY
EO Offset error(1) TA = 25°C, INP = AGND –0.9 ±0.1 0.9 mV
TCEO Offset error temperature drift(3) 3 6.5 µV/°C
EG Gain error(1) Initial, at TA = 25°C,
VINP = 1V or VINP = –1V		 –0.25 ±0.02 0.25 %
TCEG Gain error temperature drift(4) –35 ±10 35 ppm/°C
INL Integral nonlinearity(2) Resolution: 16 bits –6 ±1 6 LSB
DNL Differential nonlinearity Resolution: 16 bits –0.99 0.99 LSB
PSRR Power-supply rejection ratio AVDD DC PSRR, IN = AGND,
AVDD from 3.3V to 5V with ±10% variation around nominal		 –83 dB
AVDD AC PSRR, IN = AGND,
AVDD with10kHz / 100mV ripple		 –63
AC ACCURACY
SNR Signal-to-noise ratio VIN = 2VPP, fIN = 1kHz 84.5 89 dB
SINAD Signal-to-noise + distortion VIN = 2VPP, fIN = 1kHz 77 88 dB
THD Total harmonic distortion(5) VIN = 2VPP, fIN = 1kHz –91 –80 dB
DIGITAL INPUT (CMOS Logic With Schmitt-Trigger)
IIN Input current DGND ≤ VIN ≤ DVDD 7 µA
CIN Input capacitance 4 pF
VIH High-level input voltage 0.7 x DVDD DVDD + 0.3 V
VIL Low-level input voltage –0.3 0.3 x DVDD V
DIGITAL OUTPUT (CMOS)
CLOAD Output load capacitance fCLKIN = 10MHz 15 30 pF
VOH High-level output voltage IOH = –4mA DVDD – 0.4 V
VOL Low-level output voltage IOL = 4mA 0.4 V
POWER SUPPLY
IAVDD High-side supply current 5.3 7 mA
IDVDD Low-side supply current CLOAD = 15pF 3.6 5 mA
AVDDUV High-side undervoltage detection threshold AVDD rising 2.4 2.6 2.8 V
AVDD falling 1.9 2.05 2.2
DVDDUV Low-side undervoltage detection threshold DVDD rising 2.3 2.5 2.7 V
DVDD falling 1.9 2.05 2.2
(1) The typical value includes one sigma statistical variation.
(2) Integral nonlinearity is defined as the maximum deviation from a straight line passing through the end-points of the ideal ADC transfer
function expressed as number of LSBs or as a percent of the specified linear full-scale range FSR.
(3) Offset error drift is calculated using the box method, as described by the following equation:
TCEO = (valueMAX - valueMIN) / TempRange
(4) Gain error drift is calculated using the box method, as described by the following equation:
TCEG (ppm) = ((valueMAX - valueMIN) / (value x TempRange)) X 106
(5) THD is the ratio of the rms sum of the amplitudes of first five higher harmonics to the amplitude of the fundamental.