SBAS920 October   2018 AMC1302-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Insulation Characteristics Curves
    12. 6.12 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Isolation Channel Signal Transmission
      3. 7.3.3 Fail-Safe Output
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 What to Do and What Not to Do
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

minimum and maximum specifications apply from TA = –40°C to +125°C, VDD1 = 3.0 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, INP = –50 mV to +50 mV, and INN = GND1 = 0 V; typical specifications are at TA = 25°C, VDD1 = 5 V, and VDD2 = 3.3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUT
VCMov Common-mode overvoltage detection level (VINP + VINN) / 2 to GND1 VDD1 – 2.1 V
Hysteresis of common-mode overvoltage detection level 60 mV
VOS Input offset voltage(1) initial, at TA = 25°C, VINP = VINN = GND1 –100 ±10 100 μV
TCVOS Input offset drift(1) –0.8 ±0.15 0.8 µV/°C
CMRR Common-mode rejection ratio fIN = 0 Hz, VCM min ≤ VCM ≤ VCM max –100 dB
fIN = 10 kHz, VCM min ≤ VCM ≤ VCM max –98
CIN Single-ended input capacitance(2) INN = GND1, fIN = 300 kHz 4 pF
CIND Differential input capacitance(2) fIN = 300 kHz 2 pF
RIN Single-ended input resistance(2) INN = GND1 4.75 kΩ
RIND Differential input resistance(2) 4.9 kΩ
IIB Input bias current INP = INN = GND1; IIB = (IIBP + IIBN) / 2 –48.5 –36 –28.5 μA
TCIIB Input bias current drift ±1.5 nA/°C
IIO Input offset current IIO = IIBP – IIBN ±10 nA
ANALOG OUTPUT
Nominal gain 41
EG Gain error(1) initial, at TA = 25°C –0.3% ±0.05% 0.3%
TCEG Gain error drift(1) –50 ±15 50 ppm/°C
Nonlinearity(1) –0.03% ±0.01% 0.03%
Nonlinearity drift ±1 ppm/°C
THD Total harmonic distortion VIN = 100 mVPP, fIN = 10 kHz, BW = 100 kHz –85 dB
Output noise VINP = VINN = GND1, BW = 100 kHz 260 μVRMS
SNR Signal-to-noise ratio VIN = 100 mVPP, fIN = 1 kHz, BW = 10 kHz 80 84 dB
VIN = 100 mVPP, fIN = 10 kHz, BW = 100 kHz 70
PSRR Power-supply rejection ratio PSRR vs VDD1, at DC –104 dB
PSRR vs VDD1, 100-mV and 10-kHz ripple –108
PSRR vs VDD2, at DC –104
PSRR vs VDD2, 100-mV and 10-kHz ripple –87
VCMout Common-mode output voltage 1.39 1.44 1.49 V
VFAILSAFE Failsafe differential output voltage VCM > VCMov or VDD1 ≤ VDD1UV –2.6 –2.5 V
BW Output bandwidth 220 280 kHz
ROUT Output resistance On OUTP or OUTN < 0.2 Ω
Output short-circuit current ±14 mA
CMTI Common-mode transient immunity |GND1 – GND2| = 1 kV 55 80 kV/µs
POWER SUPPLY
VDD1POR VDD1 power on reset threshold voltage VDD1 falling 1.75 2.15 2.7 V
IDD1 High-side supply current 3.0 V ≤ VDD1 ≤ 3.6 V 6.2 8.5 mA
4.5 V ≤ VDD1 ≤ 5.5 V 7.2 9.8
IDD2 Low-side supply current 3.0 V ≤ VDD2 ≤ 3.6 V 5.3 7.2 mA
4.5 V ≤ VDD2 ≤ 5.5 V 5.9 8.1
The typical value includes one sigma statistical variation.
See Figure 47.