SBAS655F September 2014 – January 2020 AMC1304L05 , AMC1304L25 , AMC1304M05 , AMC1304M25
PRODUCTION DATA.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tCLK | CLKIN, CLKIN_N clock period | 49.75 | 50 | 200 | ns | |
| tHIGH | CLKIN, CLKIN_N clock high time | 19.9 | 25 | 120 | ns | |
| tLOW | CLKIN, CLKIN_N clock low time | 19.9 | 25 | 120 | ns | |
| tD | Falling edge of CLKIN, CLKIN_N to DOUT, DOUT_N valid delay | 0 | 15 | ns | ||
| tISTART | Interface startup time | DVDD at 3.0 V (min) to DOUT, DOUT_N valid with LDO_IN > 4 V | 32 | 32 | CLKIN cycles | |
| tASTART | Analog startup time | LDOIN step to 4 V with DVDD ≥ 3.0 V, and 0.1 µF at VCAP pin | 1 | ms | ||
Figure 1. Digital Interface Timing
Figure 2. Digital Interface Startup Timing