SLUS698F March   2006  – May 2017

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Battery Preconditioning
      2. 7.3.2  Battery Fast-Charge Constant Current
      3. 7.3.3  Charge-Current Monitor
      4. 7.3.4  Battery Fast-Charge Voltage Regulation
      5. 7.3.5  Charge Termination Detection and Recharge
      6. 7.3.6  Charge Status Outputs
      7. 7.3.7  PG Output (bq24080)
      8. 7.3.8  Charge-Enabled (CE) Input (bq24080)
      9. 7.3.9  Timer Enabled (TE) Input (bq24081)
      10. 7.3.10 Temperature Qualification (bq24081)
      11. 7.3.11 Timer Fault and Recovery
        1. 7.3.11.1 Condition Number 1
        2. 7.3.11.2 Condition Number 2
    4. 7.4 Device Functional Modes
      1. 7.4.1 Sleep Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Calculations
        2. 8.2.2.2 Battery Temperature Sense (bq24081)
        3. 8.2.2.3 STAT Pins (All Devices) and PG Pin (bq24080)
        4. 8.2.2.4 Selecting Input and Output Capacitors
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Layout Guidelines
      2. 10.1.2 Layout Example
      3. 10.1.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The bq24080 and bq24081 are highly integrated and flexible Li-Ion linear charge devices targeted at space-limited charger applications. They offer an integrated power FET and current sensor, high accuracy current and voltage regulation, charge status, and charge termination, in a single monolithic device. An external resistor sets the magnitude of the charge current.

8.2 Typical Application

bq24080 bq24081 s0228-01_lus698.gif Figure 10. Typical Application Circuit

8.2.1 Design Requirements

For this design example, use the parameters shown in Table 2.

Table 2. Design Parameters

PARAMETER VALUE
Supply voltage 5 V
Fast-charge current ≈ 750 mA
Battery-Temperature sense (bq24081-Q1) –2°C to 44.5°C (default setting)

8.2.2 Detailed Design Procedure

8.2.2.1 Calculations

Program the charge current for 750 mA:

Equation 5. RISET = [V(SET) × K(SET) / I(OUT)]

From Electrical Characteristics table, V(SET) = 2.5 V.

From Electrical Characteristics table, K(SET) = 322.

Equation 6. RISET = [2.5 V × 322 / 0.75 A] = 1.073 kΩ

Selecting the closest standard value, use a 1.07-kΩ resistor connected between ISET (pin 6) and ground.

8.2.2.2 Battery Temperature Sense (bq24081)

Use a Semitec 103AT-4 NTC thermistor connected between TS (pin 9) and ground.

Equation 7. RTHERM-cold = [V(TS1) / I(TS) ] = 2.5V / 100 μA = 25 kΩ
Equation 8. RTHERM-hot = [V(TS2) / I(TS) ] = 0.5V / 100 μA = 5 kΩ

Look up the corresponding temperature value in the manufacturer's resistance-temperature table for the thermistor selected. For a 103AT-4 Semitec thermistor:

5 kΩ = 44.5°C

25 kΩ = 2°C

8.2.2.3 STAT Pins (All Devices) and PG Pin (bq24080)

Status pins Monitored by Processor:

    Select a pullup resistor that can source more than the input bias (leakage) current of both the processor and status pins and still provide a logic high.

    Equation 9. RPULLUP ≤ [V(cc-pullup) – V(logic hi-min) / (I(µP-monitor) + I(STAT-OpenDrain)) ] = (3.3 V – 1.9 V) / (1 μA + 1 μA) ≤ 700 kΩ;

Connect a 100-kΩ pullup between each status pin and the VCC of the processor. Connect each status pin to a μP monitor pin.

Status viewed by LED:

    Select an LED with a current rating less than 10 mA and select a resistor to place in series with the LED to limit the current to the desired current value (brightness).

    Equation 10. RLED = [(V(IN) – V(LED-on)) / I(LED)] = (5 V – 2 V) / 1.5 mA = 2 kΩ.

    Place an LED and resistor in series between the input and each status pin.

8.2.2.4 Selecting Input and Output Capacitors

In most applications, all that is needed is a high-frequency decoupling capacitor on the input power pin. A 0.1-μF ceramic capacitor, placed in close proximity to the IN pin and GND pad works well. In some applications, it may be necessary to protect against a hot plug input voltage overshoot. This is done in three ways:

  1. The best way is to add an input zener, 6.2 V, between the IN pin and VSS.
  2. A low-power zener is adequate for the single event transient. Increasing the input capacitance lowers the characteristic impedance which makes the input resistance move effective at damping the overshoot, but risks damaging the input contacts by the high inrush current.
  3. Placing a resistor in series with the input dampens the overshoot, but causes excess power dissipation.

The device only requires a small capacitor for loop stability. A 0.1-μF ceramic capacitor placed between the OUT and GND pad is typically sufficient.

8.2.3 Application Curves

bq24080 bq24081 c002_lus698.png
Figure 11. Charge Enable Power-Up Sequence
(CE = High-to-Low)
bq24080 bq24081 c004_lus698.png
No battery – In termination deglitch prior to STAT1 going high. VOUT (VBAT) cycling between charge and done prior to screen capture
Stat1 goes high – In done state
2-V battery is inserted during the charge done state.
Charging is initiated – STAT1 goes low and charge current is applied.
Battery is removed – VOUT goes into regulation, IOUT goes to zero, and termination deglitch timer starts running (same as state 1).
Deglitch timer expires – charge done is declared.
Figure 12. Battery Hot-Plug and Removal Power Sequence