SLUSC03C August   2014  – December 2016

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Battery Only
      2. 8.3.2  Adapter Detect and ACOK Output
        1. 8.3.2.1 Adapter Overvoltage (ACOVP)
      3. 8.3.3  System Power Selection
      4. 8.3.4  System Power Up
        1. 8.3.4.1 Dynamic Power Management (IDPM) and Supplement Mode
        2. 8.3.4.2 Minimum System Voltage Regulation and LDO Mode
      5. 8.3.5  Current and Power Monitor
        1. 8.3.5.1 High Accuracy Current Sense Amplifier (IADP and IBAT)
        2. 8.3.5.2 High Accuracey Power Sense Amplifier (PMON)
      6. 8.3.6  Processor Hot Indication for CPU Throttling
      7. 8.3.7  Converter Operation
        1. 8.3.7.1 Continuous Conduction Mode (CCM)
        2. 8.3.7.2 Discontinuous Conduction Mode (DCM)
        3. 8.3.7.3 PFM Mode
        4. 8.3.7.4 Switching Frequency Adjust
      8. 8.3.8  Learn Mode
      9. 8.3.9  Charger Timeout
      10. 8.3.10 Device Protection Features
        1. 8.3.10.1 Input Overcurrent Protection (ACOC)
        2. 8.3.10.2 Converter Overcurrent Protection
        3. 8.3.10.3 Battery Overvoltage Protection (BATOVP)
        4. 8.3.10.4 System Overvoltage Protection (SYSOVP)
        5. 8.3.10.5 Thermal Shutdown Protection (TSHUT)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Battery Charging
      2. 8.4.2 System Voltage Regulation with Narrow VDC Architecture
    5. 8.5 Programming
      1. 8.5.1 SMBus Interface
        1. 8.5.1.1 SMBus Write-Word and Read-Word Protocols
        2. 8.5.1.2 Timing Diagrams
      2. 8.5.2 I2C Serial Interface
        1. 8.5.2.1 Data Validity
        2. 8.5.2.2 START and STOP Conditions
        3. 8.5.2.3 Byte Format
        4. 8.5.2.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.5.2.5 Slave Address and Data Direction Bit
        6. 8.5.2.6 Single Read and Write
        7. 8.5.2.7 Multi-Read and Multi-Write
    6. 8.6 Register Maps
      1. 8.6.1 ChargeOption0 Register
      2. 8.6.2 ChargeOption1 Register
      3. 8.6.3 ChargeOption2 Register
      4. 8.6.4 ProchotOption0 Register
      5. 8.6.5 ProchotOption1 Register
      6. 8.6.6 Setting the Charge Current
      7. 8.6.7 Setting the Maximum Charge Voltage
      8. 8.6.8 Setting the Minimum Charge Voltage
      9. 8.6.9 Setting Input Current
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application, bq24770
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Reverse Input Voltage Protection
        2. 9.2.2.2 Inductor Selection
        3. 9.2.2.3 Input Capacitor
        4. 9.2.2.4 Output Capacitor
        5. 9.2.2.5 Power MOSFETs Selection
        6. 9.2.2.6 Input Filter Design
      3. 9.2.3 Application Curves
      4. 9.2.4 Typical Application, bq24773
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
        3. 9.2.4.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Layout Consideration of Current Path
      2. 11.2.2 Layout Consideration of Short Circuit Protection
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Revision History

Changes from B Revision (October 2014) to C Revision

  • First public release of the full data sheet Go

Changes from A Revision (October 2014) to B Revision

  • Changed text in the Simplified Schematic From; "Hybrid Power Boost Charge" To NVDC Charge" Go
  • Changed Equation 1 From: "V = K(PMON)..." To:" I = K(PMON)..." Go
  • Changed 0x2011H to 0x0211H in the POS STATE column of Table 4 Go
  • Changed 0x4854H to 0x4B54H in the POS STATE column of Table 4 Go
  • Changed Table 7, column "SMBus 0x3CH" To: "SMBus 0x38H"Go

Changes from * Revision (August 2014) to A Revision