SLUSEC9A October   2020  – March 2021 BQ25618E , BQ25619E

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Power-On-Reset (POR)
      2. 9.3.2 Device Power Up From Battery Without Input Source
      3. 9.3.3 Power Up From Input Source
        1. 9.3.3.1 Power Up REGN LDO
        2. 9.3.3.2 Poor Source Qualification
        3. 9.3.3.3 Input Source Type Detection (IINDPM Threshold)
          1. 9.3.3.3.1 PSEL Pins Sets Input Current Limit
        4. 9.3.3.4 Input Voltage Limit Threshold Setting (VINDPM Threshold)
        5. 9.3.3.5 Power Up Converter in Buck Mode
        6. 9.3.3.6 HIZ Mode with Adapter Present
      4. 9.3.4 Power Path Management
        1. 9.3.4.1 Narrow Voltage DC (NVDC) Architecture
        2. 9.3.4.2 Dynamic Power Management
        3. 9.3.4.3 Supplement Mode
      5. 9.3.5 Battery Charging Management
        1. 9.3.5.1 Autonomous Charging Cycle
        2. 9.3.5.2 Battery Charging Profile
        3. 9.3.5.3 Charging Termination
        4. 9.3.5.4 Thermistor Qualification
          1. 9.3.5.4.1 JEITA Guideline Compliance During Charging Mode
        5. 9.3.5.5 Charging Safety Timer
      6. 9.3.6 Ship Mode and QON Pin
        1. 9.3.6.1 BATFET Disable (Enter Ship Mode)
        2. 9.3.6.2 BATFET Enable (Exit Ship Mode)
        3. 9.3.6.3 BATFET Full System Reset
      7. 9.3.7 Status Outputs ( STAT, INT , PG )
        1. 9.3.7.1 Power Good Indicator (PG_STAT Bit; BQ25619E only)
        2. 9.3.7.2 Charging Status Indicator (STAT)
        3. 9.3.7.3 Interrupt to Host ( INT)
      8. 9.3.8 Protections
        1. 9.3.8.1 Voltage and Current Monitoring in Buck Mode
          1. 9.3.8.1.1 Input Overvoltage Protection (ACOV)
          2. 9.3.8.1.2 System Overvoltage Protection (SYSOVP)
        2. 9.3.8.2 Thermal Regulation and Thermal Shutdown
          1. 9.3.8.2.1 Thermal Protection in Buck Mode
        3. 9.3.8.3 Battery Protection
          1. 9.3.8.3.1 Battery Overvoltage Protection (BATOVP)
          2. 9.3.8.3.2 Battery Overdischarge Protection
          3. 9.3.8.3.3 System Overcurrent Protection
      9. 9.3.9 Serial Interface
        1. 9.3.9.1 Data Validity
        2. 9.3.9.2 START and STOP Conditions
        3. 9.3.9.3 Byte Format
        4. 9.3.9.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 9.3.9.5 Slave Address and Data Direction Bit
        6. 9.3.9.6 Single Read and Write
        7. 9.3.9.7 Multi-Read and Multi-Write
    4. 9.4 Device Functional Modes
      1. 9.4.1 Host Mode and Default Mode
    5. 9.5 Register Maps
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Inductor Selection
        2. 10.2.2.2 Input Capacitor and Resistor
        3. 10.2.2.3 Output Capacitor
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.4.1 Host Mode and Default Mode

The device is a host controlled charger, but it can operate in Default Mode without host management. In Default Mode, the device can be used an autonomous charger with no host or while host is in Sleep Mode. When the charger is in Default Mode, WATCHDOG_FAULT bit is HIGH. When the charger is in Host Mode, WATCHDOG_FAULT bit is LOW.

After power-on-reset, the device starts in Default Mode with watchdog timer expired, or Default Mode. All the registers are in the default settings.

In Default Mode, the device keeps charging the battery with 10-hour fast charging safety timer. At the end of the 10-hour, the charging is stopped and the buck converter continues to operate to supply system load. Any write command to device transitions the charger from Default Mode to Host Mode. All the device parameters can be programmed by the host. To keep the device in Host Mode, the host has to reset the watchdog timer by writing 1 to WD_RST bit before the watchdog timer expires (WATCHDOG_FAULT bit is set), or disable watchdog timer by setting WATCHDOG bits = 00.

All the device parameters can be programmed by the host. To keep the device in Host Mode, the host has to reset the watchdog timer by writing 1 to WD_RST bit before the watchdog timer expires (WATCHDOG_FAULT bit is set), or disable watchdog timer by setting WATCHDOG bits = 00.

GUID-90876424-E863-4141-9C72-451B50C98992-low.gif Figure 9-14 Watchdog Timer Flow Chart