SLUSBB3E December   2013  – January 2016

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configurations and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current
    6. 7.6  Digital Input and Output DC Characteristics
    7. 7.7  LDO Regulator, Wake-up, and Auto-Shutdown DC Characteristics
    8. 7.8  ADC (Temperature and Cell Measurement) Characteristics
    9. 7.9  I2C-Compatible Interface Communication Timing Characteristics
    10. 7.10 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Data Commands
        1. 8.4.1.1 Standard Data Commands
        2. 8.4.1.2 Control(): 0x00 and 0x01
      2. 8.4.2 Alternate Chemistry Selection
      3. 8.4.3 Communications
        1. 8.4.3.1 I2C Interface
        2. 8.4.3.2 I2C Time Out
        3. 8.4.3.3 I2C Command Waiting Time
        4. 8.4.3.4 I2C Clock Stretching
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 BAT Voltage Sense Input
        2. 9.2.2.2 Integrated LDO Capacitor
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Decoupling
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YZF|9
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

  • A capacitor, of value at least 0.47 µF, is connected between the VDD pin and VSS. The capacitor should be placed close to the gauge IC and have short traces to both the VDD pin and VSS.
  • It is required to have a capacitor, at least 1.0 µF, connected between the BAT pin and VSS if the connection between the battery pack and the gauge BAT pin has the potential to pick up noise. The capacitor should be placed close to the gauge IC and have short traces to both the VDD pin and VSS.
  • If the external pullup resistors on the SCL and SDA lines will be disconnected from the host during low-power operation, it is recommend to use external 1-MΩ pulldown resistors to VSS to avoid floating inputs to the I2C engine.
  • The value of the SCL and SDA pullup resistors should take into consideration the pullup voltage and the bus capacitance. Some recommended values, assuming a bus capacitance of 10 pF, can be seen in Table 3.

    • Table 3. Recommended Values for SCL and SDA Pullup Resistors

    VPU 1.8 V 3.3 V
    RPU Range Typical Range Typical
    400 Ω ≤ RPU ≤ 37.6 kΩ 10 kΩ 900 Ω ≤ RPU ≤ 29.2 kΩ 5.1 kΩ
  • If the GPOUT pin is not used by the host, the pin should still be pulled up to VDD with a 4.7-kΩ or 10-kΩ resistor.
  • If the battery pack thermistor is not connected to the BIN pin, the BIN pin should be pulled down to VSS with a 10-kΩ resistor.
  • The BIN pin should not be shorted directly to VDD or VSS.
  • The actual device ground is the center pin (B2). The C1 pin is floating internally and can be used as a bridge to connect the board ground plane to the device ground (B2).

11.2 Layout Example

bq27621-G1 layout.gif Figure 13. Layout Example