SLUSB15J September   2012  – May 2021 BQ2947

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Pin Details
        1. 8.3.1.1 Input Sense Voltage, Vx
        2. 8.3.1.2 Output Drive, OUT
        3. 8.3.1.3 Supply Input, VDD
        4. 8.3.1.4 External Delay Capacitor, CD
    4. 8.4 Device Functional Modes
      1. 8.4.1 NORMAL Mode
      2. 8.4.2 OVERVOLTAGE Mode
      3. 8.4.3 Customer Test Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Application Configuration for Active High
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

Typical values stated where TA = 25°C and VDD = 14.4V, MIN/MAX values stated where TA = –40°C to +110°C and VDD = 3 V to 20 V (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOLTAGE PROTECTION THRESHOLDS
VOV V(PROTECT) Overvoltage Detection BQ294700, RIN = 1 kΩ 4.350 V
BQ294701, RIN = 1 kΩ 4.250 V
BQ294702, RIN = 1 kΩ 4.300 V
BQ294703, RIN = 1 kΩ 4.325 V
BQ294704, RIN = 1 kΩ 4.400 V
BQ294705, RIN = 1 kΩ 4.450 V
BQ294706, RIN = 1 kΩ 4.550 V
BQ294707, RIN = 1 kΩ 4.225 V
BQ294708, RIN = 1 kΩ 4.500 V
BQ294711, RIN = 1 kΩ 4.220 V
BQ294712, RIN = 1 kΩ 4.125 V
BQ294713, RIN = 1 kΩ 4.600 V
VHYS OV Detection Hysteresis BQ2947(1) 250 300 400 mV
VOA OV Detection Accuracy TA = 25°C –10 10 mV
VOADRIFT OV Detection Accuracy Across Temperature TA = –40°C –40 40 mV
TA = 0°C –20 20 mV
TA = 60°C –24 24 mV
TA = 110°C –54 54 mV
SUPPLY AND LEAKAGE CURRENT
IDD Supply Current (V4–V3) = (V3–V2) = (V2–V1) = (V1–VSS) = 4.0 V at TA = 25°C (See Figure 8-4.) 1 2 µA
IIN Input Current at Vx Pins (V4–V3) = (V3–V2) = (V2–V1) = (V1–VSS) = 4.0 V at TA = 25°C (See Figure 8-4.) –0.1 0.1 µA
ICELL Input Current (ALL Vx and VDD Input Pins) Current Consumption at Power down, (V4–V3) = (V3–V2) = (V2–V1) = (V1–VSS) = 2.30 V at TA = 25°C

 1.1 µA
OUTPUT DRIVE OUT, CMOS ACTIVE HIGH VERSIONS ONLY
VOUT Output Drive Voltage, Active High (V4–V3), (V3–V2), (V2–V1), or (V1–VSS) > VOV, VDD = 14.4 V, IOH = 100 µA 6 V
If three of four cells are short circuited, only one cell remains powered and > VOV, VDD = Vx (cell voltage), IOH = 100 µA VDD – 0.3 V
(V4–V3), (V3–V2), (V2–V1), and (V1–VSS) < VOV, VDD = 14.4 V, IOL = 100 µA measured into OUT pin. 250 400 mV
IOUTH OUT Source Current (during OV) (V4–V3), (V3–V2), (V2–V1), or (V1–VSS) > VOV, VDD = 14.4 V,
OUT = 0 V, measured out of OUT pin.		 4.5 mA
IOUTL OUT Sink Current (no OV) (V4–V3), (V3–V2), (V2–V1), and (V1–VSS) < VOV, VDD = 14.4 V,
OUT = VDD, measured into OUT pin .Pull resistor RPU = 5 kΩ to VDD = 14.4 V		 0.5 14 mA
OUTPUT DRIVE OUT, CMOS OPEN DRAIN ACTIVE LOW VERSIONS ONLY
VOUT Output Drive Voltage, Active High (V4–V3), (V3–V2), (V2–V1), and (V1–VSS) < VOV, VDD = 14.4 V, IOL = 100 µA measured into OUT pin. 250 400 mV
IOUTL OUT Sink Current (no OV) (V4–V3), (V3–V2), (V2–V1), and (V1–VSS) < VOV, VDD = 14.4 V,
OUT = VDD, measured into OUT pin. Pull resistor RPU = 5 kΩ to VDD = 14.4 V		 0.5 14 mA
IOUTLK OUT pin leakage (V4–V3), (V3–V2), (V2–V1), and (V1–VSS) < VOV, VDD = 14.4 V,
OUT = VDD, measured into OUT pin.		 100 nA
DELAY TIMER
tCD OV Delay Time CCD = 0.1 µF (see Section 8.3.1.4) 1 1.5 2 s
tCD_GND OV Delay Time with CD pin = 0 V Delay due to CCD capacitor shorted to ground for Customer Test Mode 20 170 ms
(1) Future option, contact TI.