SLUSCF5C April   2016  – July 2016

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  MP-A5 Coil Specification
      2. 8.3.2  High Voltage Dedicated Charging Port (HVDCP) Negotiation
      3. 8.3.3  Fast Charge Support
      4. 8.3.4  Option Select Pins
      5. 8.3.5  FOD and Parasitic Metal Object Detect (PMOD) Calibration
      6. 8.3.6  FOD Ping Calibration
      7. 8.3.7  Shut Down Through External Thermal Sensor or Trigger
      8. 8.3.8  Fault Handling and Indication
      9. 8.3.9  Power Transfer Start Signal
      10. 8.3.10 Power-On Reset
      11. 8.3.11 External Reset, RESET Pin
      12. 8.3.12 Trickle Charge and CS100
    4. 8.4 Device Functional Modes
      1. 8.4.1 LED Modes
      2. 8.4.2 Power Transfer
      3. 8.4.3 Communication
      4. 8.4.4 Power Trains
      5. 8.4.5 Power Train Voltage Control
      6. 8.4.6 Signal Processing Components
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Capacitor Selection
        2. 9.2.2.2 Current Monitoring Requirements
        3. 9.2.2.3 All Unused Pins
        4. 9.2.2.4 Input Regulators
        5. 9.2.2.5 Input Power Requirements
        6. 9.2.2.6 LED Mode
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

RGC Package
64-Pin VQFN
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
PEAK_DET 1 I Input from peak detect circuit
Reserved 2 — This pin must be connected to GND.
V_IN 3 I Transmitter Input Voltage Sense
T_SENSE 4 I Sensor input. Device shuts down when below 1 V. If not used, keep above 1 V by simply connecting to 3.3-V supply
I_SENSE 5 I Full bridge input current sense
Unused 6, 29, 30 — This pin can be either connected to GND or left open. Connecting to GND can improve layout grounding.
V33DIO 7, 44 — 3.3-V IO power supply
DGND 8, 26, 43 — GND
RESET 9 I Device reset. Use 10- to 100-kΩ pullup resistor to 3.3-V supply
Reserved 10 — This pin must be left open.
D-LO 11 O HVDCP interface
LED-A 12 O Connect to an LED with a 470-Ω resistor for status indication.
LED-B 13 O Connect to an LED with a 470-Ω resistor for status indication.
SNOOZE 14 O Force SNOOZE (500 ms low power)
CLK 15 I I2C interface, Clock
DATA 16 I/O I2C interface, Data
PWM-A 17 O PWM output A, controls one half of the full bridge in a phase-shifted full bridge. Switching dead times must be externally generated.
PWM-B 18 O PWM output B, controls other half of the full bridge in a phase-shifted full bridge. Switching dead times must be externally generated.
FP_GAIN 19 O Output to select the FOD ping calibration gain
FP_OFFSET 20 O Output to select the FOD ping calibration offset
PWM_RAIL 21 O PWM control signal for full bridge rail voltage
FOD_CAL 22 O Output to select the FOD calibration
FOD 23 O Output to select the foreign object detection (FOD) threshold
PMOD 24 O Output to select the PMOD threshold
LED-C 25 O Connect to an LED with a 470-Ω resistor for status indication.
Reserved 27, 28 — This pin can be either connected to GND or left open. Connecting to GND can improve layout grounding.
BUZZ_AC 31 O AC buzzer output. A 400-ms, 4-kHz AC pulse train when charging begins
BUZZ_DC 32 O DC buzzer output. A 400-ms DC pulse when charging begins. This could also be connected to an LED with a 470-Ω resistor.
TX_COMM 33 O Debug only. This pin echoes all TX_COMM
DPING_DISABLE 34 I Disable periodic ping backup
D+LO 35 O HVDCP interface
Reserved 36, 37, 38, 39 — These pins must be left open.
Reserved 40 — Reserved, connect to 10-kΩ resistor to GND
RX_PROP 41 O Indicates RX proprietary packet received
D+HI 42 O HVDCP interface
V33D 45 — Digital core 3.3-V supply. Be sure to decouple with bypass capacitors as close to the part as possible.
V33A 46 — Analog 3.3-V supply. This pin can be derived from V33D supply, decouple with 22-Ω resistor and additional bypass capacitors.
BPCAP 47 — Connect to 1uF bypass capacitors to 3.3-V supply and GND
AGND2 48 — GND
AGND 49 — GND
COMM_A+ 50 I Digital demodulation non-inverting input A. Connect parallel to input B+
COMM_A- 51 I Digital demodulation inverting input A. Connect parallel to input B–
COMM_B+ 52 I Digital demodulation non-inverting input B. Connect parallel to input A+
COMM_B– 53 I Digital demodulation inverting input B. Connect parallel to input A–
V_RAIL+ 54 I Feedback for full bridge rail voltage control +
V_RAIL– 55 I Feedback for full bridge rail voltage control –
COMM_C+ 56 I Digital demodulation non-inverting input C. Connect parallel to input A+
COMM_C– 57 I Digital demodulation inverting input C. Connect parallel to input A–
V33FB 58 I Reserved, leave this pin open
Reserved 59 — This pin must be connected to GND.
CAL_INPUT 60 I Input for FOD configuration
LED_MODE 61 I LED mode select
PWR_UP 62 I First power-up indicator (pull high if unused)
V_SENSE 63 I Transmitter rail voltage sense
AGND3 64 — GND
PAD -- — Flood with copper GND plane and stitch vias to PCB internal GND plane