SCHS173D November   1997  – November 2021 CD54HC259 , CD54HCT259 , CD74HC259 , CD74HCT259

PRODUCTION DATA  

  1. 1 Features
  2. 2 Description
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Prerequisite for Switching Characteristics
    6. 5.6 Switching Characteristics (2)
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • N|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

2 Description

The CDx4HC(T)259 is an 8-bit addressable latch with three active modes of operation (addressable latch, memory, 8-line demultiplexer) and one reset mode.

Device Information
PART NUMBER PACKAGE(1) BODY SIZE (NOM)
CD54HC259F3A CDIP (16) 21.34 mm × 6.92 mm
CD54HCT259F3A CDIP (16) 21.34 mm × 6.92 mm
CD74HC259E PDIP (16) 19.31 mm × 6.35 mm
CD74HCT259E PDIP (16) 19.31 mm × 6.35 mm
CD74HC259M SOIC (16) 9.90 mm × 3.90 mm
CD74HCT259M SOIC (16) 9.90 mm × 3.90 mm
(1) For all packages see the orderable addendum at the end of the data sheet.
GUID-20210218-CA0I-KML5-GSVL-1X1C3DQMRG8P-low.gif Functional Block Diagram