SCHS183E November   1998  – October 2022 CD54HC374 , CD54HC574 , CD54HCT374 , CD54HCT574 , CD74HC374 , CD74HC574 , CD74HCT374 , CD74HCT574

PRODUCTION DATA  

  1. 1 Features
  2. 2 Description
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Prerequisite for Switching Characteristics
    6. 5.6 Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • N|20
  • DW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Parameter Measurement Information

Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tt < 6 ns.

For clock inputs, fmax is measured when the input duty cycle is 50%.

The outputs are measured one at a time with one input transition per measurement.

GUID-EB3CF292-AF1E-41A1-A556-76EDB85F7F6F-low.gif
(1) CL includes probe and test-fixture capacitance.
Figure 6-1 Load Circuit for 3-State Outputs
GUID-20654E66-970D-45DC-A270-8C43E6874C69-low.gif
(1) CL includes probe and test-fixture capacitance.
Figure 6-2 Load Circuit for Push-Pull Outputs
GUID-535BFE0F-9D7B-4CA6-85AB-D09CD11F52EA-low.gif
(1) The greater between tPLH and tPHL is the same as tpd.
Figure 6-3 Voltage Waveforms, Propagation Delays for Standard CMOS Inputs
GUID-20200713-CA0I-ZTM5-PTJB-WD0LZ8VNG7PG-low.gif
(1) The greater between tr and tf is the same as tt.
Figure 6-5 Voltage Waveforms, Input and Output Transition Times for Standard CMOS Inputs
GUID-AC96879B-051A-49E4-8FE0-77EE52991418-low.gif
(1) S1 = CLOSED; S2 = OPEN.
(2) S1 = OPEN; s2 = CLOSED.
(3) tPLZ and tPHZ are the same as tdis.
(4) tPZL and tPZH are the same as ten.
Figure 6-4 Voltage Waveforms, Standard CMOS Inputs Propagation Delays
GUID-20201229-CA0I-PGLG-HN2B-WVRKFTLXGRL1-low.gif
(1) The greater between tPLH and tPHL is the same as tpd.
Figure 6-6 Voltage Waveforms, Propagation Delays for TTL-Compatible Inputs
GUID-20201229-CA0I-J2T2-8BXF-WXPFF0CDKQZC-low.gif
(1) tPLZ and tPHZ are the same as tdis.
(2) tPZL and tPZH are the same as ten.
Figure 6-7 Voltage Waveforms, TTL-Compatible CMOS Inputs Propagation Delays