SCAS918C June   2013  – November 2016 CDCE913-Q1 , CDCEL913-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (Continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 Control Terminal Configuration
      2. 10.3.2 Default Device Configuration
      3. 10.3.3 I2C Serial Interface
      4. 10.3.4 Data Protocol
    4. 10.4 Device Functional Modes
      1. 10.4.1 SDA and SCL Hardware Interface
    5. 10.5 Programming
    6. 10.6 Register Maps
      1. 10.6.1 I2C Configuration Registers
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Spread-Spectrum Clock (SSC)
        2. 11.2.2.2 PLL Frequency Planning
        3. 11.2.2.3 Crystal Oscillator Start-Up
        4. 11.2.2.4 Frequency Adjustment With Crystal Oscillator Pulling
        5. 11.2.2.5 Unused Inputs and Outputs
        6. 11.2.2.6 Switching Between XO and VCXO Mode
      3. 11.2.3 Application Curves
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Documentation Support
      1. 14.1.1 Related Documentation
    2. 14.2 Related Links
    3. 14.3 Receiving Notification of Documentation Updates
    4. 14.4 Community Resources
    5. 14.5 Trademarks
    6. 14.6 Electrostatic Discharge Caution
    7. 14.7 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grades
      • Grade 1 For CDCE913-Q1: –40°C to +125°C Ambient Operating Temperature
      • Grade 3 For CDCEL913-Q1: –40°C to +85°C Ambient Operating Temperature
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C6
  • In-System Programmability and EEPROM
    • Serial Programmable Volatile Register
    • Nonvolatile EEPROM to Store Customer Settings
  • Flexible Input Clocking Concept
    • External Crystal: 8 MHz to 32 MHz
    • On-Chip VCXO: Pull Range ±150 ppm
    • Single-Ended LVCMOS up to 160 MHz
  • Free Selectable Output Frequency up to 230  MHz
  • Low-Noise PLL Core
    • PLL Loop Filter Components Integrated
    • Low Period Jitter (Typical 50 ps)
  • Separate Output Supply Pins
    • CDCE913-Q1: 3.3 V and 2.5 V
    • CDCEL913-Q1: 1.8 V
  • Flexible Clock Driver
    • Three User-Definable Control Inputs [S0, S1, S2], for Example, SSC Selection, Frequency Switching, Output Enable, or Power Down
    • Generates Highly Accurate Clocks for Video, Audio, USB, IEEE1394, RFID, Bluetooth®, WLAN, Ethernet, and GPS
    • Generates Common Clock Frequencies Used With TI-DaVinci™, OMAP™, DSPs
    • Programmable SSC Modulation
    • Enables 0-PPM Clock Generation
  • 1.8-V Device Power Supply
  • Packaged in TSSOP
  • Development and Programming Kit for Easy PLL Design and Programming (TI Pro-Clock™)

Applications

  • Clusters
  • Head Units
  • Navigation Systems
  • Advanced Driver Assistance Systems (ADAS)

Description

The CDCE913-Q1 and CDCEL913-Q1 devices are modular, phase-locked loop (PLL) based programmable clock synthesizers. These devices provide flexible and programmable options, such as output clocks, input signals, and control pins, so that the user can configure the CDCEx913-Q1 for their own specifications.

The CDCEx913-Q1 generates up to three output clocks from a single input frequency to enable both board space and cost savings. Additionally, with multiple outputs, the clock generator can replace multiple crystals with one clock generator. This makes the device well-suited for head unit and telematics applications in infotainment and camera systems in ADAS as these platforms are evolving into smaller and more cost effective systems.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
CDCE913-Q1 TSSOP (14) 5.00 mm × 4.40 mm
CDCEL913-Q1
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

CDCE913-Q1 CDCEL913-Q1 diagram_scas918.gif

Revision History

Changes from B Revision (September 2016) to C Revision

  • Clarified different temperature range for the CDCEL913-Q1 deviceGo
  • Deleted old table notes from the Thermal Information table Go

Changes from A Revision (June 2013) to B Revision

  • Added Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo
  • Changed ESD Ratings: Human-body model (HBM) from 2500 V to 2000 V and Charged-device model (CDM) from 500 V to 1000 VGo
  • Changed second S to Sr in Byte Read ProtocolGo

Changes from * Revision (June 2013) to A Revision

  • Changed CDM ESD classification levelGo
  • Added ESD ratingsGo
  • Changed IDDPD typical From: 20 To: 30Go
  • Changed II LVCMOS input current value from typical to maximumGo
  • Changed IIH LVCMOS input current for S0, S1, and S2 value from typical to maximumGo
  • Changed IIL LVCMOS input current for S0, S1, and S2 value from typical to maximumGo
  • Changed Test Load for 50-Ω Board EnvironmentGo
  • Changed Output Selection From: (Y2, Y9) To: (Y2, Y3)Go
  • Changed text note for Block Write ProtocolGo
  • Changed 01h, Bit 7 From: For internal use – always write 1 To: Reserved – always write 0Go
  • Changed 06h, 7:1 From: 30h To: 20hGo