SCAS918D June   2013  – February 2024 CDCE913-Q1 , CDCEL913-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Control Terminal Configuration
      2. 8.3.2 Default Device Configuration
      3. 8.3.3 I2C Serial Interface
      4. 8.3.4 Data Protocol
    4. 8.4 Device Functional Modes
      1. 8.4.1 SDA and SCL Hardware Interface
    5. 8.5 Programming
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Spread-Spectrum Clock (SSC)
        2. 9.2.2.2 PLL Frequency Planning
        3. 9.2.2.3 Crystal Oscillator Start-Up
        4. 9.2.2.4 Frequency Adjustment With Crystal Oscillator Pulling
        5. 9.2.2.5 Unused Inputs and Outputs
        6. 9.2.2.6 Switching Between XO and VCXO Mode
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Register Maps
    1. 10.1 I2C Configuration Registers
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.5 Programming

Table 8-8 Command Code Definition
BITDESCRIPTION
70 = Block Read or Block Write operation
1 = Byte Read or Byte Write operation
(6:0)Byte offset for Byte Read, Block Read, Byte Write, and Block Write operations
GUID-1C6526CF-C7F5-401C-8667-B005BE4C6C82-low.gifFigure 8-3 Generic Programming Sequence

GUID-20231108-SS0I-BD30-X45R-D0VX1JTJSBXW-low.gif
Figure 8-4 Byte Write Protocol
GUID-34ED2741-320B-48A4-A5CB-E817069994D7-low.svgFigure 8-5 Byte Read Protocol

GUID-20231108-SS0I-NHBN-WWMW-T9MJBHLZ9GLH-low.gif
A. Data byte 0 bits [7:0] is reserved for Revision Code and Vendor Identification. Also, Data byte 0 is used for internal test purpose and must not be overwritten.
Figure 8-6 Block Write Protocol
GUID-C8807933-3163-4A32-9369-9495D50A1025-low.gifFigure 8-7 Block Read Protocol
GUID-041D9A4D-D85F-47E5-B091-70492FDE02D2-low.gifFigure 8-8 Timing Diagram for I2C Serial Control Interface