SCAS890E October   2009  – November 2015 CDCLVP1208

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: LVCMOS Input
    6. 6.6  Electrical Characteristics: Differential Input
    7. 6.7  Electrical Characteristics: LVPECL Output, at VCC = 2.375 V to 2.625 V
    8. 6.8  Electrical Characteristics: LVPECL Output, at VCC = 3 V to 3.6 V
    9. 6.9  Pin Characteristics
    10. 6.10 Timing Requirements
    11. 6.11 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Test Configurations
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 LVPECL Output Termination
      2. 8.4.2 Input Termination
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Fanout Buffer for Line Card Application
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Thermal Management
    2. 10.2 Power-Supply Filtering
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

RHD Package
28-Pin QFN
Top View
CDCLVP1208 po_cas890.gif
1. Thermal pad must be soldered to ground.

Pin Functions

PIN TYPE DESCRIPTION
NAME NUMBER
GND 1, 14 Ground Device grounds
INP0, INN0 9, 10 Input Differential input pair or single-ended input. Unused input pair can be left floating.
INP1, INN1 5, 6 Input Redundant differential input pair or single-ended input. Unused input pair can be left floating.
IN_SEL 4 Input Pulldown (see Pin Characteristics)
MUX select input for input choice (see Table 1)
OUTP7, OUTN7 2, 3 Output Differential LVPECL output pair no. 7. Unused output pair can be left floating.
OUTP6, OUTN6 26, 27 Output Differential LVPECL output pair no. 6. Unused output pair can be left floating.
OUTP5, OUTN5 24, 25 Output Differential LVPECL output pair no. 5. Unused output pair can be left floating.
OUTP4, OUTN4 22, 23 Output Differential LVPECL output pair no. 4. Unused output pair can be left floating.
OUTP3, OUTN3 20, 21 Output Differential LVPECL output pair no. 3. Unused output pair can be left floating.
OUTP2, OUTN2 18, 19 Output Differential LVPECL output pair no. 2. Unused output pair can be left floating.
OUTP1, OUTN1 16, 17 Output Differential LVPECL output pair no. 1. Unused output pair can be left floating.
OUTP0 OUTN0 12, 13 Output Differential LVPECL output pair no. 0. Unused output pair can be left floating.
VAC_REF 7 Output bias voltage output for capacitive coupled inputs. Do not use VAC_REF at VCC < 3 V. If used, it is recommended to use a 0.1-μF capacitor to GND on this pin. The output current is limited to 2 mA.
VCC 8, 15, 28 Power 2.5-/3.3-V supplies for the device
NC 11 Do not connect

Table 1. Input Selection Table

IN_SEL ACTIVE CLOCK INPUT
0 INP0, INN0
1 INP1, INN1