SLPS392D March   2013  – November 2017 CSD17556Q5B

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Community Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Q5B Package Dimensions
    2. 7.2 Recommended PCB Pattern
    3. 7.3 Recommended Stencil Pattern
    4. 7.4 Q5B Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DNK|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Extremely Low Resistance
  • Ultra-Low Qg and Qgd
  • Low-Thermal Resistance
  • Avalanche Rated
  • Lead-Free Terminal Plating
  • RoHS Compliant
  • Halogen Free
  • SON 5-mm × 6-mm Plastic Package

Applications

  • Point of Load Synchronous Buck in Networking, Telecom, and Computing Systems
  • Synchronous Rectification
  • Active ORing and Hotswap Applications

Description

This 30-V, 1.2-mΩ, 5-mm × 6-mm NexFET™ power MOSFET is designed to minimize losses in synchronous rectification and other power conversion applications.

Top View

CSD17556Q5B P0093-01_LPS198.gif

Product Summary

TA = 25°C TYPICAL VALUE UNIT
VDS Drain-to-Source Voltage 30 V
Qg Gate Charge Total (4.5 V) 30 nC
Qgd Gate Charge Gate-to-Drain 7.5 nC
RDS(on) Drain-to-Source On-Resistance VGS = 4.5 V 1.5
VGS = 10 V 1.2
VGS(th) Threshold Voltage 1.4 V

Device Information(1)

DEVICE QTY MEDIA PACKAGE SHIP
CSD17556Q5B 2500 13-Inch Reel SON
5.00-mm × 6.00-mm
Plastic Package
Tape and Reel
CSD17556Q5BT 250
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Absolute Maximum Ratings

TA = 25°C VALUE UNIT
VDS Drain-to-Source Voltage 30 V
VGS Gate-to-Source Voltage ±20 V
ID Continuous Drain Current (Package Limited) 100 A
Continuous Drain Current (Silicon Limited), TC = 25°C 215
Continuous Drain Current(1) 34
IDM Pulsed Drain Current, TA = 25°C(1)(2) 400 A
PD Power Dissipation(1) 3.1 W
Power Dissipation, TC = 25°C 191
TJ,
Tstg
Operating Junction,
Storage Temperature
–55 to 150 °C
EAS Avalanche Energy, Single Pulse
ID = 100 A, L = 0.1 mH, RG = 25 Ω
500 mJ
  1. Typical RθJA = 40°C/W on 1-in2 (6.45-cm2), 2-oz
    (0.071-mm) thick Cu pad on a 0.06-inch (1.52-mm) thick FR4 PCB.
  2. Max RθJC = 1.3°C/W, pulse duration ≤ 100 μs, duty cycle ≤ 1%.

RDS(on) vs VGS

CSD17556Q5B graph07_SLPS392F.png

Gate Charge

CSD17556Q5B graph04_SLPS392F.png