SLPS320B November   2012  – May 2017 CSD18502Q5B

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Community Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Q5B Package Dimensions
    2. 7.2 Recommended PCB Pattern
    3. 7.3 Recommended Stencil Pattern
    4. 7.4 Q5B Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DNK|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Specifications

5.1 Electrical Characteristics

(TA = 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain to source voltage VGS = 0 V, ID = 250 μA 40 V
IDSS Drain to source leakage current VGS = 0 V, VDS = 32 V 1 μA
IGSS Gate to source leakage current VDS = 0 V, VGS = 20 V 100 nA
VGS(th) Gate to source threshold voltage VDS = VGS, ID = 250 μA 1.5 1.8 2.2 V
RDS(on) Drain to source on resistance VGS = 4.5 V, ID = 30 A 2.5 3.3 mΩ
VGS = 10 V, ID = 30 A 1.8 2.3 mΩ
gfs Transconductance VDS = 20 V, ID = 30 A 143 S
DYNAMIC CHARACTERISTICS
Ciss Input capacitance VGS = 0 V, VDS = 20 V, ƒ= 1 MHz 3900 5070 pF
Coss Output capacitance 900 1170 pF
Crss Reverse transfer capacitance 21 27 pF
RG Series gate resistance 1.2 2.4 Ω
Qg Gate charge total (4.5 V) VDS = 20 V, ID = 30 A 25 33 nC
Qg Gate charge total (10 V) 52 68 nC
Qgd Gate charge gate to drain 8.4 nC
Qgs Gate charge gate to source 10.3 nC
Qg(th) Gate charge at Vth 6.9 nC
Qoss Output charge VDS = 20 V, VGS = 0 V 59 nC
td(on) Turn on delay time VDS = 20 V, VGS = 10 V,
IDS = 30 A, RG = 0 Ω		 5.3 ns
tr Rise time 6.8 ns
td(off) Turn off delay time 23 ns
tf Fall time 4 ns
DIODE CHARACTERISTICS
VSD Diode forward voltage ISD = 30 A, VGS = 0 V 0.8 1 V
Qrr Reverse recovery charge VDS= 20 V, IF = 30 A,
di/dt = 300 A/μs		 88 nC
trr Reverse recovery time 44 ns

5.2 Thermal Information

(TA = 25°C unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJC Junction-to-case (top of package) thermal resistance(1) 0.8 °C/W
RθJA Junction-to-ambient thermal resistance(1)(2) 50 °C/W
(1) RθJC is determined with the device mounted on a 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu pad on a 1.5 inch × 1.5 inch (3.81 cm × 3.81 cm), 0.06 inch (1.52 mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu.

CSD18502Q5B M0137-01_LPS198.gif
Max RθJA = 50°C/W when mounted on 1 inch2 (6.45 cm2) of 2 oz. (0.071 mm thick) Cu.
CSD18502Q5B M0137-02_LPS198.gif
Max RθJA = 125°C/W when mounted on a minimum pad area of 2 oz. (0.071 mm thick) Cu.

5.3 Typical MOSFET Characteristics

(TA = 25°C unless otherwise stated)
CSD18502Q5B D001_SLPS320.png
Figure 1. Transient Thermal Impedance
CSD18502Q5B D002_SLPS320.gif
Figure 2. Saturation Characteristics
CSD18502Q5B D004_SLPS320.gif
ID = 30 A VDS = 20 V
Figure 4. Gate Charge
CSD18502Q5B D006_SLPS320.gif
ID = 250 µA
Figure 6. Threshold Voltage vs Temperature
CSD18502Q5B D008_SLPS320.gif
ID = 30 A
Figure 8. Normalized On-State Resistance vs Temperature
CSD18502Q5B D010_SLPS320.gif
Single Pulse, Max RθJC = 0.8°C/W
Figure 10. Maximum Safe Operating Area
CSD18502Q5B D012_SLPS320.gif
Figure 12. Maximum Drain Current vs Temperature
CSD18502Q5B D003_SLPS320.gif
VDS = 5 V
Figure 3. Transfer Characteristics
CSD18502Q5B D005_SLPS320.gif
Figure 5. Capacitance
CSD18502Q5B D007_SLPS320.gif
Figure 7. On-State Resistance vs Gate-to-Source Voltage
CSD18502Q5B D009_SLPS320.gif
Figure 9. Typical Diode Forward Voltage
CSD18502Q5B D011_SLPS320.gif
Figure 11. Single Pulse Unclamped Inductive Switching