SLPS416C June   2014  – March 2015 CSD95372AQ5M

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Power Stage Characteristics
  7. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Functional Description
      1. 7.2.1 Powering the CSD95372AQ5M and Gate Drivers
      2. 7.2.2 Undervoltage Lockout (UVLO) Protection
      3. 7.2.3 ENABLE
      4. 7.2.4 Power Up Sequencing
      5. 7.2.5 PWM
      6. 7.2.6 FCCM
      7. 7.2.7 TAO/FAULT (Thermal Analog Output/Protection Flag)
      8. 7.2.8 Over Temperature
      9. 7.2.9 Gate Drivers
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Power Loss Curves
    3. 8.3 Safe Operating Curves (SOA)
    4. 8.4 Normalized Curves
    5. 8.5 Calculating Power Loss and SOA
      1. 8.5.1 Design Example
      2. 8.5.2 Calculating Power Loss
      3. 8.5.3 Calculating SOA Adjustments
  9. 9 Layout
    1. 9.1 Layout Guidelines
      1. 9.1.1 Recommended Schematic Overview
      2. 9.1.2 Recommended PCB Design Overview
        1. 9.1.2.1 Electrical Performance
        2. 9.1.2.2 Thermal Performance
      3. 9.1.3 Sensing Performance
    2. 9.2 Layout Example
  10. 10Application Schematic
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Mechanical Drawing
    2. 12.2 Recommended PCB Land Pattern
    3. 12.3 Recommended Stencil Opening

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DQP|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • 60 A Continuous Operating Current Capability
  • 92.4% System Efficiency at 30 A
  • Ultra-Low Power Loss of 3.3 W at 30 A
  • High Frequency Operation (up to 2 MHz)
  • High Density - SON 5 x 6 mm Footprint
  • Ultra-Low Inductance Package
  • System Optimized PCB Footprint
  • 3.3 V and 5 V PWM Signal Compatible
  • Diode Emulation Mode with FCCM
  • Analog Temperature Output
  • Input Voltages up to 16 V
  • Tri-State PWM Input
  • Integrated Bootstrap Switch
  • Optimized Dead Time for Shoot Through Protection
  • RoHS Compliant – Lead-Free Terminal Plating
  • Halogen Free

2 Applications

  • Multiphase Synchronous Buck Converter
    • High Frequency Applications
    • High Current, Low Duty Cycle Applications
  • Point-of-Load DC-DC Converters
  • Memory and Graphic Cards
  • Desktop and Server VR11.x and VR12.x for
    V-Core Synchronous Buck Converters

3 Description

The CSD95372AQ5M NexFET™ Power Stage is a highly optimized design for use in a high power, high density Synchronous Buck converters. This product integrates the driver IC and NexFET technology to complete the power stage switching function. The driver IC has a built-in selectable diode emulation function that enables DCM operation to improve light load efficiency. This combination produces high current, high efficiency, and high speed switching capability in a small 5 x 6 mm outline package. It also integrates the temperature sensing functionality to simplify system design and improve accuracy. In addition, the PCB footprint has been optimized to help reduce design time and simplify the completion of the overall system design.

Device Information(1)

Device Media Qty Package Ship
CSD95372AQ5M 13-Inch Reel 2500 SON 5 mm ×
6 mm Package		 Tape and Reel
CSD95372AQ5MT 7-Inch Reel 250
(1) For all available packages, see the orderable addendum at the end of the data sheet.

Application Diagram

CSD95372AQ5M Applications_Diagram.gif

Typical Power Stage Efficiency and Power Loss

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