SNAS364F May   2006  – April 2016 DAC102S085

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 AC and Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DAC Section
      2. 8.3.2 Output Amplifiers
      3. 8.3.3 Reference Voltage
      4. 8.3.4 Power-On Reset
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down Modes
    5. 8.5 Programming
      1. 8.5.1 Serial Interface
      2. 8.5.2 Input Shift Register
      3. 8.5.3 DSP and Microprocessor Interfacing
        1. 8.5.3.1 ADSP-2101 and ADSP-2103 Interfacing
        2. 8.5.3.2 80C51 and 80L51 Interface
        3. 8.5.3.3 68HC11 Interface
        4. 8.5.3.4 Microwire Interface
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Bipolar Operation
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Using References as Power Supplies
      1. 10.1.1 LM4130
      2. 10.1.2 LM4050
      3. 10.1.3 LP3985
      4. 10.1.4 LP2980
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
        1. 12.1.1.1 Specification Definitions
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

9.1.1 Bipolar Operation

The DAC102S085 is designed for single supply operation and thus has a unipolar output. However, a bipolar output may be obtained with the circuit shown in Figure 37. This circuit provides an output voltage range of ±5 V. A rail-to-rail amplifier should be used if the amplifier supplies are limited to ±5 V.

DAC102S085 20195517.gif Figure 37. Bipolar Operation

The output voltage of this circuit for any code is found using Equation 2.

Equation 2. VO = (VA × (D / 1024) × ((R1 + R2) / R1) - VA × R2 / R1)
Equation 3. VO = (10 × D / 1024) - 5 V

where

  • D is the input code in decimal form
  • VA = 5 V
  • R1 = R2

A list of rail-to-rail amplifiers suitable for this application are indicated in Table 2.

Table 2. Some Rail-to-Rail Amplifiers

AMP PKGS Typical VOS Typical ISUPPLY
LMC7111 DIP-8, SOT23-5 0.9 mV 25 µA
LM7301 SO-8, SOT23-5 0.03 mV 620 µA
LM8261 SOT23-5 0.7 mV 1 mA

9.2 Typical Application

DAC102S085 typ_app_drive_adc_reference_snas364.gif Figure 38. Driving an ADC Reference

9.2.1 Design Requirements

Figure 38 shows Channel A of the DAC102S085 providing the drive or supply voltage for a bridge sensor. By having the sensor supply voltage adjustable, the output of the sensor can be optimized to the input level of the ADC monitoring it.

9.2.2 Detailed Design Procedure

The output of the sensor is amplified by a fixed gain amplifier stage with a differential gain of 1 + 2 × (RF / RI). The advantage of this amplifier configuration is the high input impedance seen by the output of the bridge sensor. The disadvantage is the poor common-mode rejection ratio (CMRR). The common-mode voltage (VCM) of the bridge sensor is half of DAC output of Channel A. The VCM is amplified by a gain of 1 V/V by the amplifier stage and thus becomes the bias voltage for the input of the ADC121S705. Channel B of the DAC102S085 is providing the reference voltage to the ADC121S705. The reference for the ADC121S705 may be set to any voltage from 1 V to 5 V, providing the widest dynamic range possible.

The reference voltage for Channel A and B is powered by an external 5-V power supply. Because the 5-V supply is common to the sensor supply voltage and the reference voltage of the ADC, fluctuations in the value of the
5-V supply has a minimal effect on the digital output code of the ADC. This type of configuration is often referred to as a ratiometric design. For example, an increase of 5% to the 5-V supply causes the sensor supply voltage to increase by 5%. This causes the gain or sensitivity of the sensor to increase by 5%. The gain of the amplifier stage is unaffected by the change in supply voltage. The ADC121S705 on the other hand, also experiences a 5% increase to its reference voltage. This causes the size of the least significant bit (LSB) of the ADC to increase by 5%. As a result of the gain of the sensor increasing by 5% and the LSB size of the ADC increasing by the same 5%, there is no net effect on the performance of the circuit. It is assumed that the amplifier gain is set low enough to allow for a 5% increase in the sensor output. Otherwise, the increase in the sensor output level may cause the output of the amplifiers to clip.

9.2.3 Application Curve

DAC102S085 20195505.gif Figure 39. I/O Transfer Characteristic