The DACx3204 features a Hi-Z power-down mode that is set by default at power-up, unless the device is programmed otherwise using the NVM. When the DAC output is at Hi-Z, the current through R3 is zero and the SMPS is set at the nominal output voltage of 3.3 V. To have the same nominal condition when the DAC powers up, bring up the device at the same output as VFB (that is 0.6 V). This configuration makes sure there is no current through R3 even at power-up. Calculate R1 as (VOUT – VFB) / 100 µA = 27 kΩ.
To achieve ±10% margin-high and margin-low conditions, the DAC must sink or source additional current through R1. Calculate the current from the DAC (IMARGIN) using Equation 9 as 12 µA.
To calculate the value of R3, first decide the DAC output range, and make sure to avoid the codes near zero-scale and full-scale for safe operation in the linear region. A DAC output of 20 mV is a safe consideration as the minimum output, and (1.8 V – 0.6 V – 20 mV = 1.18 V) as the maximum output. When the DAC output is at 20 mV, the power supply goes to margin high, and when the DAC output is at 1.18 V, the power supply goes to margin low. Calculate the value of R3 using Equation 10 as 48.3 kΩ. Choose a standard resistor value and adjust the DAC outputs. Choosing R3 = 47 kΩ makes the DAC margin high code as 1.164 V and the DAC margin low code as 36 mV.
When the DACx3204 are set in the current-output mode, the series resistor R3 is not required. Set the DAC output at the current-output range of –25 µA to +25 µA, and set the DAC code appropriately to achieve a margin current of ±12 µA.
The DACx3204 have a slew-rate feature that is used to toggle between margin high, margin low, and nominal outputs with a defined slew rate. See Section 7.6.7 for the slew-rate setting details.
The DAC-X-MARGIN-HIGH register value in DACx3204 results in the margin-low value at the power supply output. Similarly, the DAC-X-MARGIN-LOW register value in DACx3204 results in the margin-high value at the power-supply output.
The pseudocode for getting started with a power-supply control application is as follows:
//SYNTAX: WRITE <REGISTER NAME (Hex code)>, <MSB DATA>, <LSB DATA> //Write DAC code for nominal output (repeat for all DAC channels) //For a 1.8-V output range, the 10-bit hex code for 0.6 V is 0x155. With 16-bit left alignment, this becomes 0x5540 WRITE DAC_DATA(0x19), 0x55, 0x40 //Power-up voltage output on all channels, enables internal reference WRITE COMMON-CONFIG(0x1F), 0x12, 0x49 //Set channel 0 gain setting to 1.5x internal reference (1.8 V) WRITE DAC-0-VOUT-CMP-CONFIG(0x3), 0x08, 0x00 //Set channel 1 gain setting to 1.5x internal reference (1.8 V) WRITE DAC-1-VOUT-CMP-CONFIG(0x9), 0x08, 0x00 //Set channel 2 gain setting to 1.5x internal reference (1.8 V) WRITE DAC-2-VOUT-CMP-CONFIG(0xF), 0x08, 0x00 //Set channel 3 gain setting to 1.5x internal reference (1.8 V) WRITE DAC-3-VOUT-CMP-CONFIG(0x15), 0x08, 0x00 //Configure GPI for Margin-High, Low trigger for all channels WRITE GPIO-CONFIG(0x24), 0x01, 0xF5 //Set slew rate and code step (repeat for all channels) //CODE_STEP: 2 LSB, SLEW_RATE: 60.72 µs/step WRITE DAC-0-FUNC-CONFIG(0x06), 0x00, 0x17 //Write DAC margin high code (repeat for all channels) //For a 1.8-V output range, the 10-bit hex code for 1.164 V is 0x296. With 16-bit left alignment, this becomes 0xA540 WRITE DAC-0-MARGIN-HIGH(0x01), 0xA5, 0x40 //Write DAC margin low code (repeat for all channels) //For a 1.8-V output range, the 10-bit hex code for 36 mV is 0x14. With 16-bit left alignment, this becomes 0x0500 WRITE DAC-0-MARGIN-LOW(0x02), 0x05, 0x00 //Save settings to NVM WRITE COMMON-TRIGGER(0x20), 0x00, 0x02