SBAS349F August   2005  – June 2016 DAC8812

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
      1. 7.8.1 Channel A—5 V
      2. 7.8.2 Channel B—5 V
      3. 7.8.3 Channel A and B—5 V
      4. 7.8.4 Channel A—2.7 V
      5. 7.8.5 Channel B—2.7 V
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Digital-to-Analog Converters
      2. 8.3.2 Power-On Reset
        1. 8.3.2.1 ESD Protection Circuits
    4. 8.4 Device Functional Modes
      1. 8.4.1 Serial Data Interface
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

This design features one channel of the DAC8812 followed by a four-quadrant circuit for multiplying DACs. The circuit conditions the current output of an MDAC into a symmetrical bipolar voltage. The design uses an op amp in a transimpedance configuration to convert the MDAC current into a voltage, followed by an additional amplifier in a summing configuration to apply an offset voltage.

9.2 Typical Application

DAC8812 TypApp_SBAS349.gif Figure 35. Four-Quadrant Multiplying Application Circuit

9.2.1 Design Requirements

Using a multiplying DAC requires a transimpedance stage using an amplifier with minimal input offset voltage. The tolerance of the external resistors varies depending on the goals of the application, but for optimal performance with the DAC8812 the tolerance should be 0.1% for all of the external resistors. The summing stage amplifier also requires low input-offset voltage and enough slew rate for the output range desired.

9.2.2 Detailed Design Procedure

The first stage of the design converts the current output of the MDAC (IOUT) to a voltage (VOUT) using an amplifier in a transimpedance configuration. A typical MDAC features an on-chip feedback resistor sized appropriately to match the ratio of the resistor values used in the DAC R-2R ladder. This resistor is available using the input shown in Figure 35 called RFB on the MDAC. The MDAC reference and the output of the transimpedance stage are then connected to the inverting input of the amplifier in the summing stage to produce the output that is defined by Equation 2.

Equation 2. DAC8812 Eq02-Vout_SBAS349.gif

9.2.3 Application Curves

Figure 36 shows the output voltage vs code of this design, and Figure 37 shows the output error vs code. Notice that the error gets worse as the output code increases because the contribution of the DAC gain error increases with code.

DAC8812 D001_SBAS349.gif
Figure 36. Input Code vs Output Voltage
DAC8812 D002_SBAS349.gif
Figure 37. Input Code vs Output Error