TI recommends the following to achieve good thermal connectivity:
- A minimum of
four
power and ground planes
- ZDQ
package = 1oz copper power planes and 2oz copper ground
planes
- ZEK
package = 1oz copper power planes and 1oz copper ground
planes
- A copper plane beneath the thermal ball array containing a via farm with the following attributes
- Copper plane area (top side of PCB, under package)
- ZDQ package =
8.0mm
×
8.0mm
- ZEK
package = 4.8mm ×
4.8mm
- Copper plane area (bottom side of PCB, opposite of package)
- ZDQ
package = 6.0mm ×
6.0mm
- ZEK
package = 4.8mm ×
4.8mm
- Thermal via quantity
- ZDQ package = 7 × 7 array of vias
- ZEK package = 5 × 5 array of vias
- Thermal via size
- ZDQ package =
0.25mm
(10 mils)
- ZEK
package = 0.203mm (8
mils)
- Thermal via plating thickness
- ZDQ package =
0.05mm
(2 mils) wall thickness
- ZEK package =
0.025mm
(1 mils) wall thickness
- PCB copper coverage per layer
- Power and
ground
layers: 90% minimum coverage
- Top/bottom
signal layers (ground fill to achieve coverage): 70% minimum coverage
with
1.5oz
copper