DLPS112B June   2018  – May 2019 DLPC3479

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions – Board Level Test, Debug, and Initialization
    2.     Pin Functions – Parallel Port Input Data and Control
    3.     Pin Functions – DMD Reset and Bias Control
    4.     Pin Functions – DMD Sub-LVDS Interface
    5.     Pin Functions – Peripheral Interface
    6.     Pin Functions – GPIO Peripheral Interface
    7.     Pin Functions – Clock and PLL Support
    8.     Pin Functions – Power and Ground
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics over Recommended Operating Conditions
    6. 6.6  Electrical Characteristics
    7. 6.7  High-Speed Sub-LVDS Electrical Characteristics
    8. 6.8  Low-Speed SDR Electrical Characteristics
    9. 6.9  System Oscillators Timing Requirements
    10. 6.10 Power-Up and Reset Timing Requirements
    11. 6.11 Parallel Interface Frame Timing Requirements
    12. 6.12 Parallel Interface General Timing Requirements
    13. 6.13 Flash Interface Timing Requirements
  7. Parameter Measurement Information
    1. 7.1 HOST_IRQ Usage Model
    2. 7.2 Input Source
      1. 7.2.1 Input Source - Frame Rates
      2. 7.2.2 Parallel Interface Supports Six Data Transfer Formats
        1. 7.2.2.1 PDATA Bus – Parallel Interface Bit Mapping Modes
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Pattern Display
        1. 8.3.1.1 External Pattern Mode
          1. 8.3.1.1.1 8-bit Monochrome Patterns
          2. 8.3.1.1.2 1-Bit Monochrome Patterns
        2. 8.3.1.2 Internal Pattern Mode
          1. 8.3.1.2.1 Free Running Mode
          2. 8.3.1.2.2 Trigger In Mode
      2. 8.3.2  Interface Timing Requirements
        1. 8.3.2.1 Parallel Interface
      3. 8.3.3  Serial Flash Interface
      4. 8.3.4  Tested Flash Devices
      5. 8.3.5  Serial Flash Programming
      6. 8.3.6  SPI Signal Routing
      7. 8.3.7  I2C Interface Performance
      8. 8.3.8  Content-Adaptive Illumination Control
      9. 8.3.9  Local Area Brightness Boost (LABB)
      10. 8.3.10 3-D Glasses Operation
      11. 8.3.11 DMD (Sub-LVDS) Interface
      12. 8.3.12 Calibration and Debug Support
      13. 8.3.13 DMD Interface Considerations
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 DLPC3479 System Design Consideration
    2. 10.2 System Power-Up and Power-Down Sequence
    3. 10.3 DLPC3479 Power-Up Initialization Sequence
    4. 10.4 DMD Fast PARK Control (PARKZ)
    5. 10.5 Hot Plug Usage
    6. 10.6 Maximum Signal Transition Time
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Layout Guidelines for Internal ASIC PLL Power
      2. 11.1.2 DLPC3479 Reference Clock
      3. 11.1.3 General PCB Recommendations
      4. 11.1.4 General Handling Guidelines for Unused CMOS-Type Pins
      5. 11.1.5 Maximum Pin-to-Pin, PCB Interconnects Etch Lengths
      6. 11.1.6 Number of Layer Changes
      7. 11.1.7 Stubs
      8. 11.1.8 Terminations
      9. 11.1.9 Routing Vias
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
        1. 12.1.1.1 Device Markings
      2. 12.1.2 Video Timing Parameter Definitions
    2. 12.2 Documentation Support
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • 2xDLPC3479 display and light controller for DLP4710 (.47 1080p) TRP DMD
  • Display features:
    • Supports input image sizes up to 1080p
    • Input frame rates to 60 Hz (2D and 3D)
    • 24-Bit, input pixel interface support
      • Parallel or BT656, interface protocols
      • Pixel clock up to 150 MHz
    • Image processing:IntelliBright™ algorithms, image resizing, Color Coordinate Adjustment (CCA), programmable degamma
  • Light control features:
    • Pattern display optimized for machine vision and digital exposure
    • Flexible internal (1D) and external (2D) pattern streaming modes
      • Programmable exposure times
      • High-speed pattern rates up to 1440 Hz (1-bit) and 180 Hz (8-bit)
    • Programmable 2D static patterns via splash
    • Internal pattern streaming mode enables simplified system design
      • Eliminates the need for video interface
      • Store >1000 patterns in flash memory
    • Flexible trigger signals for camera or sensor synchronization
      • One configurable input trigger
      • Two configurable output triggers
  • System features:
    • I2C control of device configuration
    • Programmable splash screens
    • Programmable LED current control
    • Compatible with the DLPA3000 and DLPA3005 PMIC/LED drivers