Changes from Revision E (March 2019) to Revision F (June 2021)
- Updated the numbering format for tables, figures, and
cross-references throughout the documentGo
- Feature section updated to highlight key features.Go
- Added trademarkGo
- Added clarification on Tx_CLK
state in reset in pin function
table.Go
- Added clarification on TX_CLK state in reset
in IO Pins State During Reset
tableGo
- Added 100BASE-FX output parameters Go
- Added AVO footnoteGo
- Added timing requirement for reset after stabilization of XI clock. Go
- Added RMII transmit latency number Go
- Added RGMII transmit latency number Go
- Added RMII receive latency numberGo
- Added RGMII receive latency number.Go
- Updated details of earlier "reserved" bits of register 0x000B and
0x003FGo
- Updated description for register 0x0015 and 0x001CGo
- Added register description of following registers:
0x101,0x0106,0x0107,0x0126,0x04D4,0x0121,0x0122,0x0124,0x010F,0x0111,0x0129,0x0130,0x0410,0x0416,0x0418,0x0450,0x040D
,0x041F,0x0421Go
- Added further information to registers
0x0000,0x0001,0x0469,0x0703CGo
- Updated default values for registers
:0x0008,0x000A,0x0010,0x0017,0x001E,0x0155,0x0215,0x0462,0x3000,0x3001,0x3014,0x3016Go
- Changed TPI network diagram to include optional ferrite bead for EMC improvementGo