SNOSAX1F May 2008 – September 2015 DP83849I
Place the 49.9-Ω,1% resistors, and 0.1-μF decoupling capacitor near the PHYTER TD± and RD± pins and through directly to the VDD plane.
Stubs must be avoided on all signal traces, especially the differential signal pairs. See Figure 8-1. Within the pairs (for example, TD+ and TD-) the trace lengths must be run parallel to each other and matched in length. Matched lengths minimize delay differences, avoiding an increase in common mode noise and increased EMI. See Figure 8-1.
Ideally, there must be no crossover or through on the signal paths. Vias present impedance discontinuities and must be minimized. Route an entire trace pair on a single layer if possible. PCB trace lengths must be kept as short as possible.
Signal traces must not be run such that they cross a plane split. See Figure 8-2. A signal crossing a plane split may cause unpredictable return path currents and would likely impact signal quality as well, potentially creating EMI problems.
MDI signal traces must have 50 Ω to ground or 100-Ω differential controlled impedance. Many tools are available online to calculate this.
To meet signal integrity and performance requirements, at minimum a 4-layer PCB is recommended for implementing PHYTER components in end user systems. The following layer stack-ups are recommended for four, six, and eight-layer boards, although other options are possible.
Within a PCB it may be desirable to run traces using different methods, microstrip vs. stripline, depending on the location of the signal on the PCB. For example, it may be desirable to change layer stacking where an isolated chassis ground plane is used. Figure 8-4 illustrates alternative PCB stacking options.