SLVSD18C June   2015  – August 2017 DRV8880

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified System Diagram
      2.      Microstepping Current Waveform
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Indexer Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Stepper Motor Driver Current Ratings
        1. 7.3.1.1 Peak Current Rating
        2. 7.3.1.2 RMS Current Rating
        3. 7.3.1.3 Full-Scale Current Rating
      2. 7.3.2  PWM Motor Drivers
      3. 7.3.3  Microstepping Indexer
      4. 7.3.4  Current Regulation
      5. 7.3.5  Decay Modes
        1. 7.3.5.1 Mode 1: Slow Decay for Increasing and Decreasing Current
        2. 7.3.5.2 Mode 2: Slow Decay for Increasing Current, Mixed Decay for Decreasing current
        3. 7.3.5.3 Mode 3: Mixed Decay for Increasing and Decreasing Current
        4. 7.3.5.4 Mode 4: Slow Decay for Increasing Current, Fast Decay for Decreasing current
        5. 7.3.5.5 Mode 5: Fast Decay for Increasing and Decreasing Current
      6. 7.3.6  Smart Tune
      7. 7.3.7  Adaptive Blanking Time
      8. 7.3.8  Charge Pump
      9. 7.3.9  LDO Voltage Regulator
      10. 7.3.10 Logic and Tri-Level Pin Diagrams
      11. 7.3.11 Power Supplies and Input Pins
      12. 7.3.12 Protection Circuits
      13. 7.3.13 VM UVLO (UVLO2)
      14. 7.3.14 Logic Undervoltage (UVLO1)
      15. 7.3.15 VCP Undervoltage Lockout (CPUV)
      16. 7.3.16 Thermal Shutdown (TSD)
      17. 7.3.17 Overcurrent Protection (OCP)
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Stepper Motor Speed
        2. 8.2.2.2 Current Regulation
        3. 8.2.2.3 Decay Modes
        4. 8.2.2.4 Sense Resistor
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
    1. 9.1 Bulk Capacitance Sizing
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RHR|28
  • PWP|28
Thermal pad, mechanical data (Package|Pins)
Orderable Information

LDO Voltage Regulator

An LDO regulator is integrated into the DRV8880. It can be used to provide the supply voltage for low-current devices. For proper operation, bypass V3P3 to GND using a ceramic capacitor.

The V3P3 output is nominally 3.3 V. When the V3P3 LDO current load exceeds 10 mA, the LDO will behave like a constant current source. The output voltage will drop significantly with currents greater than 10 mA.

DRV8880 LDO_V_reg_lvsd18.gifFigure 22. LDO Diagram

If a digital input needs to be tied permanently high (that is, M or TOFF), it is preferable to tie the input to V3P3 instead of an external regulator. This will save power when VM is not applied or in sleep mode: V3P3 is disabled and current will not be flowing through the input pulldown resistors. For reference, logic level inputs have a typical pulldown of 100 kΩ, and tri-level inputs have a typical pulldown of 40 kΩ.