SNLS645A August   2019  – December 2019 DS160PR410

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Electrical Characteristics
    6. 6.6 High Speed Electrical Characteristics
    7. 6.7 SMBUS/I2C Timing Charateristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Linear Equalization
      2. 7.3.2 DC Gain
      3. 7.3.3 Receiver Detect State Machine
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active PCIe Mode
      2. 7.4.2 Active Buffer Mode
      3. 7.4.3 Standby Mode
    5. 7.5 Programming
      1. 7.5.1 Control and Configuration Interface
        1. 7.5.1.1 Pin Mode
          1. 7.5.1.1.1 Four-Level Control Inputs
        2. 7.5.1.2 SMBUS/I2C Register Control Interface
        3. 7.5.1.3 SMBus/I2C Master Mode Configuration (EEPROM Self Load)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 PCIe x4 Lane Configuration
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 DisplayPort Application
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.1.3 Application Curves

The DS160PR410 is a linear redriver that can be used to extend channel reach of a PCIe link. Normally, PCIe-compliant TX and RX are equipped with signal-conditioning functions and can handle channel losses of up to 28 dB at 8 GHz. With the DS160PR410, the total channel loss between a PCIe root complex and an end point can be up to 45 dB at 8 GHz.

Figure 12 shows an electric link that models a single channel of a PCIe link and eye diagrams measured at different locations along the link. The source that models a PCIe TX sends a 16 Gbps PRBS-15 signal with P7 presets. After a transmission channel with –30 dB at 8-GHz insertion loss, the eye diagram is fully closed. The DS160PR410 with its CTLE set to the maximum (18 dB boost) together with the source TX equalization compensates for the losses of the pre-channel (TL1) and opens the eye at the output of the DS160PR410.

The post-channel (TL2) losses mandate the use of PCIe RX equalization functions such as CTLE and DFE that are normally available in PCIe compliant receivers.

DS160PR410 PR410_40dB_Channel_Example.gifFigure 12. PCIe Gen 4.0 Link Reach Extension Using DS160PR410