SNLS344G July   2011  – August 2015 DS80PCI102

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Electrical Characteristics
    5. 6.5 Electrical Characteristics — Serial Management Bus Interface
    6. 6.6 Timing Diagrams
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 4-Level Input Configuration Guidelines
    4. 7.4 Device Functional Modes
      1. 7.4.1 Pin Control Mode
      2. 7.4.2 SMBUS Mode
    5. 7.5 Programming
      1. 7.5.1 System Management Bus (SMBus) and Configuration Registers
      2. 7.5.2 Transfer of Data Through the SMBus
      3. 7.5.3 SMBus Transactions
      4. 7.5.4 Writing a Register
      5. 7.5.5 Reading a Register
      6. 7.5.6 EEPROM Programming
        1. 7.5.6.1 Master EEPROM Programming
        2. 7.5.6.2 EEPROM Address Mapping
    6. 7.6 Register Maps
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 3.3-V or 2.5-V Supply Mode Operation
    2. 9.2 Power Supply Bypass
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from F Revision (October 2014) to G Revision

  • Changed pin mapping for VIN and VDD to correct typoGo
  • Added full SMBus-to-EEPROM table mappingGo
  • Changed description of EEPROM bits to match corresponding SMBus register map description Go
  • Changed location of CHB VOD in Table 7 to match correct location in EEPROM mapGo
  • Changed address start and end numbers for Devices 0-3 to reflect correct bytes per device Go
  • Changed EEPROM bit description to match the description in the corresponding SMBus register map Go
  • Changed location of CHA VOD in Table 9 to match correct location in EEPROM map Go
  • Added information in Register Map about register bits saved to EEPROM Go

Changes from E Revision (February 2013) to F Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo