SLAS975A November   2013  – August 2015 HD3SS6126

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - Device Parameters
    6. 6.6 Electrical Characteristics - Signal Switch Parameters
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Power Supply
        2. 8.2.2.2 Differential Pairs
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

RUA Package
42-Pin WQFN
Top View
HD3SS6126 pinout_SLAS975.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
GND 10, 14, 17,
19, 21		 Supply Ground
HSA(p) 8 I/O Port A USB 2.0 positive signal
HSA(n) 7 Port A USB 2.0 negative signal
HSB(p) 31 I/O Port B USB 2.0 positive signal
HSB(n) 32 Port B USB 2.0 negative signal
HSC(p) 33 I/O Port C USB 2.0 positive signal
HSC(n) 34 Port C USB 2.0 negative signal
HS_OE 6 I (Control) Output Enable
H = Power Down
L = Normal Operation
NC 1, 2, 3, 4, 5,
18, 35, 36,
37, 38, 39,
40, 41, 42		 — Electrically No Connection
SEL 9 I (Control) USB 3.0/2.0 Port Selection Control Pins
SSA0(p) 11 I/O Port A, Channel 0, USB 3.0 Positive Signal
SSA0(n) 12 Port A, Channel 0, USB 3.0 Negative Signal
SSA1(p) 15 I/O Port A, Channel 1, USB 3.0 Positive Signal
SSA1(n) 16 Port A, Channel 1, USB 3.0 Negative Signal
SSB0(p) 29 I/O Port B, Channel 0, USB 3.0 Positive Signal
SSB0(n) 28 Port B, Channel 0, USB 3.0 Negative Signal
SSB1(p) 27 I/O Port B, Channel 1, USB 3.0 Positive Signal
SSB1(n) 26 Port B, Channel 1, USB 3.0 Negative Signal
SSC0(p) 25 I/O Port C, Channel 0, USB 3.0 Positive Signal
SSC0(n) 24 Port C, Channel 0, USB 3.0 Negative Signal
SSC1(p) 23 I/O Port C, Channel 1, USB 3.0 Positive Signal
SSC1(n) 22 Port C, Channel 1, USB 3.0 Negative Signal
VDD 13, 20, 30 Supply 3.3-V power supply voltage