SBOS152B August   1987  – March 2025 INA106

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Gain Error and Drift
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
    3. 7.3 Additional Applications
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Examples
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI (Free Software Download)
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Application Information

Figure 7-1 shows the basic connections required for operation of the INA106. Place power supply bypass capacitors close to the device pins as shown.

INA106 Basic Power Supply and Signal
                                                  ConnectionsFigure 7-1 Basic Power Supply and Signal Connections

The differential input signal is connected to pins 2 and 3 as shown. The source impedance connected to the inputs must be equal for good common-mode rejection. A 5Ω mismatch in source impedance degrades the common-mode rejection of a typical device to approximately 86dB. If the source has a known source impedance mismatch, an additional resistor in series with one input can be used to preserve good common-mode rejection.

The output is referred to the output reference terminal (pin 1) which is normally grounded. A voltage applied to the Ref terminal is summed with the output signal. To maintain good common-mode rejection, keep the source impedance of a signal applied to the Ref terminal less than 10Ω.

Figure 7-2 shows a voltage applied to pin 1 to trim the offset voltage of the INA106. The known 100Ω source impedance of the trim circuit is compensated by the 10Ω resistor in series with pin 3 to maintain good CMR.

INA106 Offset AdjustmentFigure 7-2 Offset Adjustment

Referring to Figure 7-1, the CMR depends upon the match of the internal R4/R3 ratio to the R1/R2 ratio. A CMR of 106dB requires resistor matching of 0.005%. To maintain high CMR over temperature, the resistor TCR tracking must be better than 2ppm/°C. These accuracies are difficult and expensive to reliably achieve with discrete components.