SBOSAC3A July   2023  – December 2023 INA745A , INA745B

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements (I2C)
    7. 5.7 Timing Diagram
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Integrated Shunt Resistor
      2. 6.3.2 Safe Operating Area
      3. 6.3.3 Versatile Measurement Capability
      4. 6.3.4 Internal Measurement and Calculation Engine
      5. 6.3.5 High-Precision Delta-Sigma ADC
        1. 6.3.5.1 Low Latency Digital Filter
        2. 6.3.5.2 Flexible Conversion Times and Averaging
      6. 6.3.6 Integrated Precision Oscillator
      7. 6.3.7 Multi-Alert Monitoring and Fault Detection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
      2. 6.4.2 Power-On Reset
    5. 6.5 Programming
      1. 6.5.1 I2C Serial Interface
        1. 6.5.1.1 Writing to and Reading Through the I2C Serial Interface
        2. 6.5.1.2 High-Speed I2C Mode
        3. 6.5.1.3 SMBus Alert Response
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Device Measurement Range and Resolution
      2. 7.1.2 ADC Output Data Rate and Noise Performance
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Configure the Device
        2. 7.2.2.2 Set Desired Fault Thresholds
        3. 7.2.2.3 Calculate Returned Values
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
    5. 7.5 Register Maps
      1. 7.5.1 INA745x Registers
  9. Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

SMBus Alert Response

The INA745x is designed to respond to the SMBus Alert Response address. The SMBus Alert Response provides a quick fault identification for simple targets. When an Alert occurs, the controller can broadcast the Alert Response target address (0001 100) with the Read/Write bit set high. Following this Alert Response, any target that generates an alert identifies itself by acknowledging the Alert Response and sending its address on the bus.

The Alert Response can activate several different targets simultaneously, similar to the I2C General Call. If more than one target attempts to respond, bus arbitration rules apply. The losing device does not generate an Acknowledge and continues to hold the Alert line low until that device wins arbitration.