SLLSF09F December   2017  – August 2026

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Transient Immunity
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Thermal Information
    6. 5.6  Power Ratings
    7. 5.7  Insulation Specifications
    8. 5.8  Safety-Related Certifications
    9. 5.9  Safety Limiting Values
    10. 5.10 Electrical Characteristics - DC Specification
    11. 5.11 Switching Characteristics
    12. 5.12 Insulation Characteristics Curves
    13. 5.13 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Test Circuits
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 CAN Bus States
      2. 7.3.2 Digital Inputs and Outputs: TXD (Input) and RXD (Output)
      3. 7.3.3 Protection Features
        1. 7.3.3.1 TXD Dominant Timeout (DTO)
        2. 7.3.3.2 Thermal Shutdown (TSD)
        3. 7.3.3.3 Undervoltage Lockout and Default State
        4. 7.3.3.4 Floating Pins
        5. 7.3.3.5 Unpowered Device
        6. 7.3.3.6 CAN Bus Short Circuit Current Limiting
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Bus Loading, Length and Number of Nodes
        2. 8.2.2.2 CAN Termination
      3. 8.2.3 Application Curve
        1. 8.2.3.1 Insulation Lifetime
    3. 8.3 DeviceNet Application
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 PCB Material
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DWV|8
  • DW|16
Thermal pad, mechanical data (Package|Pins)

7.3.1 CAN Bus States

The CAN bus has two states during operation: dominant and recessive. A dominant bus state, equivalent to logic low, is when the bus is driven differentially by a driver. A recessive bus state is when the bus is biased to a common mode of VCC / 2 through the high-resistance internal input resistors of the receiver, equivalent to a logic high. The host microprocessor of the CAN node uses the TXD pin to drive the bus and receives data from the bus on the RXD pin. See Figure 7-1 and Figure 7-2.

ISO1042 Bus States (Physical Bit Representation)Figure 7-1 Bus States (Physical Bit Representation)
ISO1042 Simplified Recessive Common Mode Bias and ReceiverFigure 7-2 Simplified Recessive Common Mode Bias and Receiver