SLLSEF1B September   2013  – August 2015 ISO7142CC

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics, 5 V
    6. 6.6  Electrical Characteristics, 3.3 V
    7. 6.7  Electrical Characteristics, 2.7 V
    8. 6.8  Power Dissipation Characteristics
    9. 6.9  Switching Characteristics, 5 V
    10. 6.10 Switching Characteristics, 3.3 V
    11. 6.11 Switching Characteristics, 2.7 V
    12. 6.12 Supply Current, 5 V
    13. 6.13 Supply Current, 3.3 V
    14. 6.14 Supply Current, 2.7 V
    15. 6.15 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Insulation and Safety-Related Specifications
      2. 8.3.2 Regulatory Information
      3. 8.3.3 Safety Limiting Values
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Parameter Measurement Information

ISO7142CC switch_test_circuit_sllsek9.gif
A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω. At the input, a 50-Ω resistor is required to terminate the input-generator signal. It is not needed in an actual application.
B. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 8. Switching-Characteristics Test Circuit and Voltage Waveforms
ISO7142CC delay_tim_llse25.gif
A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, tr ≤ 3 ns, tf ≤ 3 ns, ZO = 50 Ω.
B. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 9. Enable/Disable Propagation Delay-Time Test Circuit and Waveform
ISO7142CC failsafe_LLSEF1.gif
A. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%.
Figure 10. Failsafe Delay-Time Test Circuit and Voltage Waveforms
ISO7142CC com_tran_imm_test_circ_sllsek9.gif
A. CL = 15pF and includes instrumentation and fixture capacitance within ±20%.
Figure 11. Common-Mode Transient Immunity Test Circuit