SLLS755Q July 2006 – January 2021 ISO7220A , ISO7220B , ISO7220C , ISO7220M , ISO7221A , ISO7221B , ISO7221C , ISO7221M
A minimum of four layers are required to accomplish a low EMI PCB design (see Figure 11-1). Layer stacking should be in the following order (top-to-bottom): high-speed signal layer, ground plane, power plane and low-frequency signal layer.
If an additional supply voltage plane or signal layer is needed, add a second power or ground plane system to the stack to keep it symmetrical. Adding a second plane system to the stack makes the stack mechanically stable and prevents it from warping. The power and ground plane of each power system can be placed closer together, thus increasing the high-frequency bypass capacitance significantly.
For detailed layout recommendations, refer to the Digital Isolator Design Guide.