SNIS234
October 2023
ISOTMP35-Q1
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Insulation Specification
6.6
Electrical Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Features Description
7.3.1
Integrated Isolation Barrier and Thermal Response
7.3.2
Analog Output
7.3.3
Thermal Response
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.1.1
Output Voltage Linearity
8.1.2
Load Regulation
8.1.3
Start-Up Settling Time
8.1.4
Thermal Response
8.1.5
External Buffer
8.1.6
ADC Selection and Impact on Accuracy
8.1.7
Implementation Guidelines
8.1.8
PSRR
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Insulation Lifetime
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Mechanical, Packaging, and Orderable Information
10.1
Package Option Addendum
10.2
Tape and Reel Information
Package Options
Mechanical Data (Package|Pins)
DFQ|7
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snis234_oa
8.4
Layout