SNVS715B March   2011  – June 2019 LM21212-2

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Application Circuit
  4. 4 Revision History
  5. 5 Description, continued
  6. 6 Pin Configuration and Functions
    1.     Pin Descriptions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Ratings
    4. 7.4 Electrical Characteristics
    5. 7.5 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Precision Enable
      2. 8.3.2 UVLO
      3. 8.3.3 Current Limit
      4. 8.3.4 Short-Circuit Protection
      5. 8.3.5 Thermal Protection
      6. 8.3.6 Power-Good Flag
      7. 8.3.7 Light Load Operation
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Typical Application 1
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 9.2.1.2.2 Output Voltage
          3. 9.2.1.2.3 Precision Enable
          4. 9.2.1.2.4 Soft Start
          5. 9.2.1.2.5 Resistor-Adjustable Frequency
          6. 9.2.1.2.6 Inductor Selection
          7. 9.2.1.2.7 Output Capacitor Selection
          8. 9.2.1.2.8 Input Capacitor Selection
          9. 9.2.1.2.9 Control Loop Compensation
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Typical Application Schematic 2
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
  10. 10Layout
    1. 10.1 Layout Considerations
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.1.2.8 Input Capacitor Selection

Quality input capacitors are necessary to limit the ripple voltage at the PVIN pin while supplying most of the switch current during the on-time. Additionally, they help minimize input voltage droop in an output current transient condition. In general, it is recommended to use a ceramic capacitor for the input as it provides both a low impedance and small footprint. Use of a high-grade dielectric for the ceramic capacitor, such as X5R or X7R, will provide improved performance over temperature and also minimize the DC voltage derating that occurs with Y5V capacitors. The input capacitors should be placed as close as possible to the PVIN and PGND pins.

Non-ceramic input capacitors should be selected for RMS current rating and minimum ripple voltage. A good approximation for the required ripple current rating is given by the relationship:

Equation 9. LM21212-2 30155110.gif

As indicated by the RMS ripple current equation, highest requirement for RMS current rating occurs at 50% duty cycle. For this case, the RMS ripple current rating of the input capacitor should be greater than half the output current. For best performance, place low ESR ceramic capacitors in parallel with higher capacitance capacitors to provide the best input filtering for the device.

When operating at low input voltages (3.3 V or lower), additional capacitance may be necessary to protect from triggering an under-voltage condition on an output current transient. This will depend on the impedance between the input voltage supply and the LM21212-2, as well as the magnitude and slew rate of the output transient.

The AVIN pin requires a 1-µF ceramic capacitor to AGND and a 1-Ω resistor to PVIN. This RC network filter inherent noise on PVIN from the sensitive analog circuitry connected to AVIN.