SNVS411D January   2006  – December 2025 LM25005

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Resistance Characteristics
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 High Voltage Start-Up Regulator
      2. 6.3.2 Oscillator and Sync Capability
      3. 6.3.3 Error Amplifier and PWM Comparator
      4. 6.3.4 RAMP Generator
      5. 6.3.5 Soft-Start
      6. 6.3.6 Current Limit
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown / Standby
      2. 6.4.2 Boost Pin
      3. 6.4.3 Thermal Protection
  8. 7 Application and Implementation
    1. 7.1 Application Information Disclaimer
    2. 7.2 Application Information
      1. 7.2.1 Bias Power Dissipation Reduction
    3. 7.3 Typical Application
      1. 7.3.1 Design Requirements
      2. 7.3.2 Detailed Design Procedure
        1. 7.3.2.1 Custom Design With WEBENCH® Tools
        2. 7.3.2.2 External Components
          1. 7.3.2.2.1  R3 (RT)
          2. 7.3.2.2.2  L1
          3. 7.3.2.2.3  C3 (CRAMP)
          4. 7.3.2.2.4  C9, C10
          5. 7.3.2.2.5  D1
          6. 7.3.2.2.6  C1, C2
          7. 7.3.2.2.7  C8
          8. 7.3.2.2.8  C7
          9. 7.3.2.2.9  C4
          10. 7.3.2.2.10 R5, R6
          11. 7.3.2.2.11 R1, R2, C12
          12. 7.3.2.2.12 R7, C11
          13. 7.3.2.2.13 R4, C5, C6
      3. 7.3.3 Application Curves
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
      3. 7.5.3 Power Dissipation
      4. 7.5.4 Thermal Design
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
      2. 8.1.2 Development Support
        1. 8.1.2.1 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Export Control Notice
    8. 8.8 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.3 Error Amplifier and PWM Comparator

The internal high gain error amplifier generates an error signal proportional to the difference between the regulated output voltage and an internal precision reference (1.225V). The output of the error amplifier is connected to the COMP pin allowing the user to provide loop compensation components, generally a type II network, as illustrated in Section 6.2. This network creates a pole at DC, a zero and a noise reducing high frequency pole. The PWM comparator compares the emulated current sense signal from the RAMP generator to the error amplifier output voltage at the COMP pin.