SNVS953G December 2012 – May 2021 LM25018
The input capacitor is typically a combination of a smaller bypass capacitor located near the regulator IC and a larger bulk capacitor. The total input capacitance must be large enough to limit the input voltage ripple to a desired amplitude. For input ripple voltage ΔVIN, CIN can be calculated using Equation 32.
Choosing a ΔVIN of 0.5 V gives a minimum CIN of 0.3 μF. A standard value of 0.47 μF is selected for CBYP in this design. A bulk capacitor of higher value reduces voltage spikes due to parasitic inductance between the power source to the converter. A standard value of 2.2 μF is selected for for CIN in this design. The voltage ratings of the two input capacitors must be greater than the maximum input voltage under all conditions.