7.3.1 Boost Function

Capacitor C_BOOST and diode D2 in Figure 26 are used to generate a voltage V_BOOST. V_BOOST – V_SW is the gate-drive voltage to the internal NMOS control switch. To properly drive the internal NMOS switch during its on time, V_BOOST must be at least 2.5 V greater than V_SW. TI recommends that V_BOOST be greater than 2.5 V above V_SW for best efficiency. V_BOOST – V_SW must not exceed the maximum operating limit of 5.5 V. For best performance, see Equation 1.

When the LM2738 starts up, internal circuitry from the BOOST pin supplies a maximum of 20 mA to C_BOOST. This current charges C_BOOST to a voltage sufficient to turn the switch on. The BOOST pin continues to source current to C_BOOST until the voltage at the feedback pin is greater than 0.76 V.

There are various methods to derive V_BOOST:

1. From the input voltage (3 V < V_IN < 5.5 V)
2. From the output voltage (2.5 V < V_OUT < 5.5 V)
3. From an external distributed voltage rail (2.5 V < V_EXT < 5.5 V)
4. From a shunt or series Zener diode

As seen on the Functional Block Diagram, capacitor C_BOOST and diode D2 supply the gate-drive voltage for the NMOS switch. Capacitor C_BOOST is charged via diode D2 by V_IN. During a normal switching cycle, when the internal NMOS control switch is off (T_OFF) (refer to Figure 25), V_BOOST equals V_IN minus the forward voltage of D2 (V_FD2), during which the current in the inductor (L) forward biases the Schottky diode D1 (V_FD1). Therefore the voltage stored across C_BOOST is Equation 2:

When the NMOS switch turns on (T_ON), the switch pin rises to Equation 3:

forcing V_BOOST to rise, thus reverse biasing D2. The voltage at V_BOOST is then Equation 4:

which is approximately 2 V_IN – 0.4 V for many applications. Thus the gate-drive voltage of the NMOS switch is approximately V_IN – 0.2 V.

An alternate method for charging C_BOOST is to connect D2 to the output as shown in Figure 26. The output voltage must be between 2.5 V and 5.5 V so that proper gate voltage is applied to the internal switch. In this circuit, C_BOOST provides a gate-drive voltage that is slightly less than V_OUT.

Figure 26. V_OUT Charges C_BOOST

In applications where both V_IN and V_OUT are greater than 5.5 V, or less than 3 V, C_BOOST cannot be charged directly from these voltages. If V_IN and V_OUT are greater than 5.5 V, C_BOOST can be charged from V_IN or V_OUT minus a Zener voltage by placing a Zener diode D3 in series with D2, as shown in Figure 27. When using a series Zener diode from the input, ensure that the regulation of the input supply does not create a voltage that falls outside the recommended V_BOOST voltage.

(V_INMAX – V_D3) < 5.5 V

(V_INMIN – V_D3) > 2.5 V

Figure 27. Zener Reduces Boost Voltage from V_IN

An alternative method is to place the Zener diode D3 in a shunt configuration as shown in Figure 28. A small 350-mW to 500-mW 5.1-V Zener in a SOT-23 or SOD package can be used for this purpose. A small ceramic capacitor such as a 6.3-V, 0.1-µF capacitor (C4) must be placed in parallel with the Zener diode. When the internal NMOS switch turns on, a pulse of current is drawn to charge the internal NMOS gate capacitance. The 0.1-µF parallel shunt capacitor ensures that the V_BOOST voltage is maintained during this time.

Figure 28. Boost Voltage Supplied from the Shunt Zener on V_IN

Resistor R3 must be selected to provide enough RMS current to the Zener diode (D3) and to the BOOST pin. A recommended choice for the Zener current (I_ZENER) is 1 mA. The current I_BOOST into the BOOST pin supplies the gate current of the NMOS control switch and varies typically according to the formula in Equation 5 for the X version:

I_BOOST can be calculated for the Y version using Equation 6:

The formula for I_BOOST in Equation 6 gives typical current. For the worst case I_BOOST, increase the current by 40%. In that case, the worst case boost current is Equation 7:

R3 is then given by Equation 8:

For example, using the X-version let V_IN = 10 V, V_ZENER = 5 V, V_D2 = 0.7 V, I_ZENER = 1 mA, and duty cycle
D = 50%. Then Equation 9 and Equation 10:

7.3.2 Soft-Start

This function forces V_OUT to increase at a controlled rate during start-up. During soft-start, the error amplifier’s reference voltage ramps from 0 V to its nominal value of 0.8 V in approximately 600 µs. This forces the regulator output to ramp up in a more linear and controlled fashion, which helps reduce in-rush current.

7.3.3 Output Overvoltage Protection

The overvoltage comparator compares the FB pin voltage to a voltage that is 16% higher than the internal reference V_REF. Once the FB pin voltage goes 16% above the internal reference, the internal NMOS control switch is turned off, which allows the output voltage to decrease toward regulation.

7.3.4 Undervoltage Lockout

Undervoltage lockout (UVLO) prevents the LM2738 from operating until the input voltage exceeds 2.7 V (typical).

The UVLO threshold has approximately 400 mV of hysteresis, so the part operates until V_IN drops below 2.3 V (typical). Hysteresis prevents the part from turning off during power up if the V_IN ramp-up is non-monotonic.

7.3.5 Current Limit

The LM2738 uses cycle-by-cycle current limiting to protect the output switch. During each switching cycle, a current limit comparator detects if the output switch current exceeds 2.9 A (typical), and turns off the switch until the next switching cycle begins.

7.3.6 Thermal Shutdown

Thermal shutdown limits total power dissipation by turning off the output switch when the device junction temperature exceeds 165°C. After thermal shutdown occurs, the output switch doesn’t turn on until the junction temperature drops to approximately 150°C.

7.4.1 Enable Pin and Shutdown Mode

The LM2738 has a shutdown mode that is controlled by the enable pin (EN). When a logic low voltage is applied to EN, the part is in shutdown mode, and its quiescent current drops to typically 400 nA. The voltage at this pin must never exceed V_IN + 0.3 V.