SNOSB43C September   2011  – November 2016 LM3560

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Specifications (SCL, SDA)
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Amplifier Synchronization (Tx1)
        1. 7.3.1.1 TX1 Shutdown
      2. 7.3.2 Independent LED Control
      3. 7.3.3 Hardware Torch
      4. 7.3.4 Fault Protections
        1. 7.3.4.1 Overvoltage Protection
        2. 7.3.4.2 Current Limit
        3. 7.3.4.3 Flash Timeout
        4. 7.3.4.4 Indicator LED/Thermistor (LED1/NTC)
          1. 7.3.4.4.1 Message Indicator Current Source (LEDI/NTC)
            1. 7.3.4.4.1.1 Message Indicator Example 1 (Single Pulse With Dead Time):
            2. 7.3.4.4.1.2 Message Indicator Example 2 (Multiple Pulses With Dead Time):
          2. 7.3.4.4.2 Updating The Message Indicator
      5. 7.3.5 Input Voltage Monitor
        1. 7.3.5.1 Input Voltage Flash Monitor (Flash Current Rising)
      6. 7.3.6 Last Flash Register
      7. 7.3.7 LED Voltage Monitor
      8. 7.3.8 ADC Delay
      9. 7.3.9 Flags Register and Fault Indicators
        1. 7.3.9.1 Flash Timeout
        2. 7.3.9.2 Thermal Shutdown
        3. 7.3.9.3 LED Fault
        4. 7.3.9.4 TX1 and TX2 Interrupt Flags
        5. 7.3.9.5 LED Thermal Fault (NTC Flag)
        6. 7.3.9.6 VIN Flash Monitor Fault
        7. 7.3.9.7 VIN Monitor Fault
    4. 7.4 Device Functional Modes
      1. 7.4.1  Start-Up (Enabling the Device)
      2. 7.4.2  Pass Mode
      3. 7.4.3  Flash Mode
      4. 7.4.4  Torch Mode
      5. 7.4.5  Privacy Indicator Mode
      6. 7.4.6  GPIO1 Mode
      7. 7.4.7  TX2/INT/GPIO2
      8. 7.4.8  TX2 Mode
        1. 7.4.8.1 TX2 Shutdown
      9. 7.4.9  GPIO2 Mode
      10. 7.4.10 Interrupt Output (INT Mode)
      11. 7.4.11 NTC Mode
      12. 7.4.12 Alternate External Torch (AET) Mode
      13. 7.4.13 Automatic Conversion Mode
      14. 7.4.14 Manual Conversion Mode
    5. 7.5 I2C-Compatible Interface
      1. 7.5.1 START and STOP Conditions
      2. 7.5.2 I2C-Compatible Chip Address
      3. 7.5.3 Transferring Data
    6. 7.6 Register Descriptions
      1. 7.6.1  Enable Register (Address 0x10)
      2. 7.6.2  Privacy Register (Address 0x11)
      3. 7.6.3  Indicator Register (Address 0x12)
      4. 7.6.4  Indicator Blinking Register (Address 0x13)
      5. 7.6.5  Privacy PWM Period Register (Address 0x14)
      6. 7.6.6  GPIO Register (Address 0x20)
      7. 7.6.7  LED Forward Voltage ADC (VLED Monitor Register, Address 0x30)
      8. 7.6.8  ADC Delay Register (Address 0x31)
      9. 7.6.9  VIN Monitor Register (Address 0x80)
      10. 7.6.10 Last Flash Register (Address 0x81)
      11. 7.6.11 Torch Brightness Register Descriptions (Address 0xA0)
      12. 7.6.12 Flash Brightness Register (Address 0xB0)
      13. 7.6.13 Flash Duration Register (Address 0xC0)
      14. 7.6.14 Flags Register (Address 0xD0)
      15. 7.6.15 Configuration Register 1 (Address 0xE0)
      16. 7.6.16 Configuration Register 2 (Address 0xF0)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 LM3560 Typical Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Output Capacitor Selection
          2. 8.2.1.2.2 Input Capacitor Selection
          3. 8.2.1.2.3 Inductor Selection
      2. 8.2.2 NTC Thermistor Application
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Recommendations
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Recommendations

The high switching frequency and large switching currents of the LM3560 make the choice of layout important. Use the following steps as a reference to ensure the device is stable and maintains proper LED current regulation across its intended operating voltage and current range.

  1. Place CIN on the top layer (same layer as the LM3560) and as close as possible to the device. The input capacitor conducts the driver currents during the low side MOSFET turnon and turnoff and can detect current spikes over 1 A in amplitude. Connecting the input capacitor through short wide traces to both the IN and GND pins reduces the inductive voltage spikes that occur during switching and which can corrupt the VIN line.
  2. Place COUT on the top layer (same layer as the LM3560) and as close as possible to the OUT and GND pins. The returns for both CIN and COUT should come together at one point, and as close as possible to the GND pin. Connecting COUT through short wide traces reduce the series inductance on the OUT and GND pins that can corrupt the VOUT and GND line and cause excessive noise in the device and surrounding circuitry.
  3. Connect the inductor on the top layer close to the SW pin. There must be a low-impedance connection from the inductor to SW due to the large DC inductor current, and at the same time the area occupied by the SW node must be small so as to reduce the capacitive coupling of the high dV/dt present at SW that can couple into nearby traces.
  4. Avoid routing logic traces near the SW node so as to avoid any capacitively coupled voltages from SW onto any high-impedance logic lines such as TX1/TORCH/GPIO1, TX2/INT/GPIO2, HWEN, LEDI/NTC (NTC mode), SDA, and SCL. A good approach is to insert an inner layer GND plane underneath the SW node and between any nearby routed traces. This creates a shield from the electric field generated at SW.
  5. Terminate the flash LED cathodes directly to the GND pin of the LM3560. If possible, route the LED returns with a dedicated path to keep the high amplitude LED currents out of the GND plane. For flash LEDs that are routed relatively far away from the LM3560, a good approach is to sandwich the forward and return current paths over the top of each other on two layers. This helps reduce the inductance of the LED current paths.
  6. The NTC thermistor is intended to have its return path connected to the LEDs cathode. This allows the thermistor resistive divider voltage (VNTC) to trip the comparators threshold as VNTC is falling. Additionally, the thermistor-to-LED cathode junction should be connected as close as possible in order to reduce the thermal impedance from the LED and the thermistor. The drawback is that the thermistor's return detects the switching currents from the boost converter of the device. Because of this, it is necessary to have a filter capacitor at the NTC pin which terminates close to the GND of the LM3560 (see CBYP in Figure 42).

10.2 Layout Example

LM3560 layout_snosb43.gif Figure 48. LM3560 Layout