SNVSA63A Data sheet

SNVSA63A April 2015 – September 2015 LM3632A

PRODUCTION DATA.

Package Options

Mechanical Data (Package|Pins)

YFF|30
- MXBG359A

Thermal pad, mechanical data (Package|Pins)

Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings⁽¹⁾

Over operating free-air temperature range (unless otherwise noted)

	MIN	MAX	UNIT
Voltage on VIN, FL_SW, FL_OUT, FLED, EN, LCM_EN1, LCM_EN2, PWM, STROBE, TX, SCL, SDA	–0.3	6	V
Voltage on LCM_SW, LCM_OUT, VPOS, C1	–0.3	7	V
Voltage on VNEG, C2	–7	0.3	V
Voltage on BL_SW, BL_VOUT, BLED1, BLED2	–0.3	30	V
Continuous power dissipation		Internally limited
Maximum junction temperature, T_J(MAX)		150	°C
Storage temperature, T_stg	–45	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±1000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted).

		MIN	MAX	UNIT
Input voltage, V_IN		2.7	5	V
Operating ambient temperature, T_A ⁽¹⁾		–40	85	°C

(1) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (T_A-MAX) is dependent on the maximum operating junction temperature (T_J-MAX-OP = 125ºC), the maximum power dissipation of the device in the application (P_D-MAX), and the junction-to-ambient thermal resistance of the part/package in the application (R_θJA), as given by the following equation: T_A-MAX = T_J-MAX-OP – (R_θJA × P_D-MAX).

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		LM3632A	UNIT
		YFF (DSBGA)
		30 PINS
R_θJA	Junction-to-ambient thermal resistance	58.6	°C/W
R_θJC	Junction-to-case (top) thermal resistance	0.2
R_θJB	Junction-to-board thermal resistance	8.3
Ψ_JT	Junction-to-top characterization parameter	1.4
Ψ_JB	Junction-to-board characterization parameter	8.3

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Unless otherwise specified, limits apply over the full operating ambient temperature range (−40°C ≤ T_A ≤ 85°C), V_IN = 3.7 V, V_VPOS = 5.5 V, V_VNEG = –5.4 V, V_{LCM_OUT} = 6 V.

PARAMETER		TEST CONDITION		MIN	TYP	MAX	UNIT
CURRENT CONSUMPTION
I_SD	Shutdown current	EN = 0			1	4	µA
I_Q	Quiescent current, device not switching	EN = V_IN, LCD bias boost disabled			2	10	µA
I_{LCD_EN}		LCD bias boost enabled, no-load			0.5		mA
DEVICE PROTECTION
TSD	Thermal shutdown				140		°C
BACKLIGHT LED CURRENT SINKS
I_{LED_MAX}	Maximum output current in BLED1/2	2.7 V ≤ V_IN ≤ 5 V, linear or exponential mode			25		mA
I_{LED_MIN}	Minimum output current in BLED1/2	2.7 V ≤ V_IN ≤ 5 V, linear or exponential mode			50		µA
I_ACCU	LED current accuracy⁽¹⁾	2.7 V ≤ V_IN ≤ 5 V, 50 µA ≤ I_LED ≤ 25 mA, linear or exponential mode		-3%	0.1%	3%
I_MATCH	LED1 to LED2 current matching⁽¹⁾	2.7 V ≤ V_IN ≤ 5 V, 300 µA ≤ I_LED ≤ 25 mA, linear or exponential mode		-2%	0.1%	2%
BACKLIGHT BOOST CONVERTER
V_{OVP_BL}	Backlight boost output overvoltage protection	2.7 V ≤ V_IN ≤ 5 V, 29 V option		28	28.75	29.5	V
Efficiency	Typical efficiency⁽²⁾	I_LED= 5 mA/string, V_IN = 3.7 V (2 x 7 LEDs), (P_OUT/P_IN)			87%
V_HR	Regulated current sink headroom voltage	I_LED = 25 mA			250		mV
V_HR	Regulated current sink headroom voltage	I_LED = 5 mA			100		mV
V_{HR_MIN}	Current sink minimum headroom voltage	I_LED = 95% of nominal, I_LED = 5 mA			30		mV
R_DSON	NMOS switch on resistance	I_SW = 100 mA			0.25		Ω
I_CL	NMOS switch current limit	2.7 V ≤ V_IN ≤ 5 V		900	1000	1100	mA
ƒ_{SW_BLBOOST}	Switching frequency	2.7 V ≤ V_IN ≤ 5 V	500-kHz mode	450	500	550	kHz
ƒ_{SW_BLBOOST}	Switching frequency	2.7 V ≤ V_IN ≤ 5 V	1-MHz mode	900	1000	1100	kHz
D_MAX	Maximum duty cycle				94%
LCM BIAS BOOST CONVERTER
V_{OVP_LCM}	LCM bias boost output overvoltage protection	2.7 V ≤ V_IN ≤ 5 V			7		V
ƒ_{SW_LCMBST}	Switching frequency ⁽³⁾	2.7 V ≤ V_IN ≤ 5 V			2500		kHz
V_{LCM_OUT}	Bias boost output voltage range			4.5		6.4	V
	Output voltage step size				50		mV
	Peak-to-peak ripple voltage ⁽³⁾	I_LOAD = 5 mA & 50 mA, C_BST = 10 µF			50		mVpp
	LCM_OUT line transient response ⁽³⁾	V_IN + 500 mVp-p AC square wave, Tr = 100 mV/µs, 200 Hz, 12.5 % duty, I_LOAD = 5 mA, C_IN = 10 µF		–50	±25	50	mV
	LCM_OUT load transient response ⁽³⁾	Load current step 0 mA to 100 mA, T_RISE/FALL = 100 mA/µs, C_IN = 10 µF		–150		150	mV
I_{CL_LCMBST}	Valley current limit				1000		mA
R_{DSON_LCMBST}	High-side MOSFET on resistance	V_IN = V_GS= 5 V, T_A = 25°C			170		mΩ
R_{DSON_LCMBST}	Low-side MOSFET on Resistance	V_IN = V_GS= 5 V, T_A = 25°C			290		mΩ
EFF_LCMBST	Efficiency ⁽²⁾	V_{LCM_OUT} = 6 V, 5 mA < I_LCMBST < 100 mA			92%
t_{ST_LCMBST}	Start-up time (LCM_OUT), V_{LCM_OUT} = 10% to 90% ⁽³⁾	C_{LCM_BST} = 10 µF				1000	µs
DISPLAY BIAS POSITIVE OUTPUT (VPOS)
V_VPOS	Programmable output voltage range			4		6	V
	Output voltage step size				50		mV
	Output voltage accuracy	Output voltage = 5.4 V		–1.5%		1.5%
	VPOS line transient response ⁽³⁾	V_IN + 500 mVp-p AC square wave, Tr = 100 mV/µs, 200 Hz, I_LOAD = 25 mA, C_IN = 10 µF		–50		50	mV
	VPOS load transient response ⁽³⁾	0 to 50 mA load transient, C_VPOS = 10 µF		–50		50	mV
	DC load regulation ⁽³⁾	0 mA ≤ I_VPOS ≤ 50 mA				20	mV
I_{MAX_VPOS}	Maximum output current				50		mA
I_{CL_VPOS}	Output current limit				80		mA
I_{RUSH_PK_VPOS}	Peak start-up inrush current ⁽³⁾	V_{LCM_OUT} = 6.3 V, V_POS = 5.8 V, C_VPOS = 10 µF				250	mA
V_{DO_VPOS}	VPOS dropout voltage ⁽⁴⁾	I_VPOS = 50 mA, V_VPOS = 5.5 V				100	mV
t_{ST_VPOS}	Start-up time VPOS, V_VPOS = 10% to 90% ⁽³⁾	C_VPOS = 10 µF	500-µs setting		500		µs
t_{ST_VPOS}	Start-up time VPOS, V_VPOS = 10% to 90% ⁽³⁾	C_VPOS = 10 µF	800-µs setting		800		µs
R_{PD_VPOS}	Output pull-down resistor (VPOS)	VPOS disabled		30	80	110	Ω
DISPLAY BIAS NEGATIVE OUTPUT (VNEG)
V_{OVP_VNEG}	LCM bias negative charge-pump output overvoltage protection	Below V_VNEG output voltage target			–250		mV
V_{SHORT_VNEG}	LCM bias negative charge-pump output short circuit protection	VNEG to CP_GND			–750		mV
V_VNEG	Programmable output voltage range			–6		–4	V
	Output voltage step size				50		mV
	Output accuracy	Output voltage = –5.4 V		–1.5%		1.5%
	Peak-to-peak ripple voltage⁽³⁾	I_LOAD = 5 mA & 50 mA, C_VNEG = 10 µF			60		mVpp
	VNEG line transient response⁽³⁾	V_IN + 500 mVp-p AC square wave, 100 mV/µs 200 Hz, 12.5% duty at 5 mA		–50	±25	50	mV
	VNEG load transient response⁽³⁾	0 to 50 mA load transient, T_RISE/FALL = 1 µs, C_VNEG = 10 µF				100	mV
	Efficiency⁽²⁾	V_IN = 3.7 V, V_{LCM_OUT} = 5.8 V, V_VNEG = –5.4 V, I_VNEG > 5 mA			92%
I_{MAX_VNEG}	Maximum output current⁽³⁾	V_IN = 3.7 V, V_{LCM_OUT} = 5.8 V, V_VNEG = –5.4 V			50		mA
I_{CL_VNEG}	Output current limit⁽³⁾				75		mA
R_{DSON_VNEG}	Charge FET pump on resistance	Q1			350		mΩ
		Q2			400
		Q3			400
t_{ST_VNEG}	Start-up time (V_VNEG), V_VNEG = 10% to 90%⁽³⁾	V_VNEG = –6 V, C_VNEG = 10 µF			1		ms
R_{PU_VNEG}	Output pullup resistor, VNEG⁽³⁾	VNEG Disabled, V_{LCM_OUT} > 4.8 V			20	40	Ω
FLASH DRIVER BOOST
I_LED	Current source accuracy	1.5-A flash, V_{FL_OUT} = 4 V		1.4	1.5	1.6	A
V_OVP	Output overvoltage protection trip point	ON threshold		4.85	5	5.1	V
V_OVP	Output overvoltage protection trip point	OFF threshold		4.75	4.9	5	V
V_HR	Current source regulation voltage	1.5-A flash, V_{FL_OUT} = 4 V			275		mV
I_CL	Switch current limit			2.45	2.8	3.15	A
I_CL	Switch current limit			1.65	1.9	2.15	A
R_NMOS	NMOS switch on resistance	I_NMOS = 1 A			80		mΩ
R_PMOS	PMOS switch on resistance	I_PMOS = 1 A			100		mΩ
V_VINM	Input voltage monitor trip threshold			2.76	2.9	3.04	V
LOGIC INPUTS (PWM, EN, LCM_EN1, LCM_EN2, SCL, SDA, TX, STROBE)
V_IL	Input logic low			0		0.4	V
V_IH	Input logic high			1.2		V_IN	V
LOGIC OUTPUTS (SDA)
V_OL	Output logic low	2.7 V ≤ V_IN ≤ 5 V, I_OL = 3 mA		0		0.4	V
PWM INPUT
ƒ_{PWM_INPUT}	PWM input frequency⁽²⁾			100		20000	Hz
	Minimum PWM ON/OFF time⁽³⁾	PWM sampling frequency = 1 MHz		6			µs
	Minimum PWM ON/OFF time⁽³⁾	PWM sampling frequency = 4 MHz		1.5			µs
	PWM timeout⁽³⁾	PWM sampling frequency = 1 MHz			25		ms
	PWM timeout⁽³⁾	PWM sampling frequency = 4 MHz			3		ms

(1) Output Current Accuracy is the difference between the actual value of the output current and programmed value of this current. Matching is the maximum difference from the average. For the constant current sinks on the device (BLED1 and BLED2), the following is determined: the maximum output current (MAX), the minimum output current (MIN), and the average output current of both outputs (AVG). Matching number is calculated: (I_LED1 – I_LED2)/(I_LED1 + I_LED2). The typical specification provided is the most likely norm of the matching figure of all parts. Note that some manufacturers have different definitions in use.

(2) Typical value only for information.

(3) Limits set by characterization and/or simulation only.

(4) V_{IN_VPOS} – V_VPOS when V_VPOS has dropped 100 mV below target.

6.6 I²C Timing Requirements (SDA, SCL) ⁽¹⁾

Over operating free-air temperature range (unless otherwise noted)(see Figure 1).

		MIN	MAX	UNIT
ƒ_SCL	Clock frequency		400	kHz
1	Hold time (repeated) START condition	0.6		µs
2	Clock low time	1.3		µs
3	Clock high time	600		ns
4	Set-up time for a repeated START condition	600		ns
5	Data hold time	50		ns
6	Data set-up time	100		ns
7	Rise time of SDA and SCL	20 + 0.1C_b	300	ns
8	Fall time of SDA and SCL	15 + 0.1C_b	300	ns
9	Set-Up time between a STOP and a START condition	1.3		µs
C_b	Capacitive load for each bus line	10	200	pF

(1) Limits set by characterization and/or simulation only.

LM3632A LM3631_I2C_Timing_Parameters.gif

Figure 1. I²C Timing Parameters

6.7 Typical Characteristics

Ambient temperature is 25°C and V_IN is 3.7 V unless otherwise noted.

Figure 2. Backlight LED Current, Linear Control

2p6s LEDs

Figure 4. Backlight LED Current Matching

2p6s LEDs

Figure 6. Backlight LED Current Accuracy

2p6s LEDs

Figure 8. Backlight LED Current-Step Ratio

2p6s LEDs

Figure 10. Backlight Boost Voltage

2p6s LEDs

Figure 12. Backlight Headroom Voltage

I_FLED = 1.5 A	ƒ = 4 MHz

Figure 14. Flash LED Current

ƒ = 4MHz

Figure 16. Torch LED Current

I_FLED = 1.5 A	ƒ = 4 MHz	V_FLED = 4 V

Figure 18. Flash Headroom Voltage

V_EN = V_IN	I2C = V_IN

Figure 20. Iq Standby

Figure 3. Backlight LED Current, Exponential Control

2p6s LEDs

Figure 5. Backlight LED Current Matching

2p6s LEDs

Figure 7. Backlight LED Current Accuracy

2p6s LEDs

Figure 9. Backlight LED Current-Step Ratio

2p7s LEDs

Figure 11. Backlight Boost Voltage

ƒ = 4 MHz

Figure 13. Flash LED Current

I_FLED = 0.8 A	f = 4 MHz

Figure 15. Flash LED Current

I_FLED = 375 mA	ƒ = 4 MHz

Figure 17. Torch LED Current

V_EN = 0 V	I2C = 0 V

Figure 19. Iq Shutdown

V_EN = 1.8 V	I2C = 1.8 V

Figure 21. Iq Standby