SNVS787I January   2012  – August 2021 LM5018


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Control Overview
      2. 7.3.2  VCC Regulator
      3. 7.3.3  Regulation Comparator
      4. 7.3.4  Overvoltage Comparator
      5. 7.3.5  On-Time Generator
      6. 7.3.6  Current Limit
      7. 7.3.7  N-Channel Buck Switch and Driver
      8. 7.3.8  Synchronous Rectifier
      9. 7.3.9  Undervoltage Detector
      10. 7.3.10 Thermal Protection
      11. 7.3.11 Ripple Configuration
      12. 7.3.12 Soft Start
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Application Circuit: 12.5- to 95-V Input and 10-V, 300-mA Output Buck Converter
        1. Design Requirements
        2. Detailed Design Procedure
          1. Custom Design With WEBENCH® Tools
          2. RFB1, RFB2
          3. Frequency Selection
          4. Inductor Selection
          5. Output Capacitor
          6. Type II Ripple Circuit
          7. VCC and Bootstrap Capacitor
          8. Input Capacitor
          9. UVLO Resistors
        3. Application Curves
      2. 8.2.2 Typical Isolated DC-DC Converter Using LM5018
        1. Design Requirements
        2. Detailed Design Procedure
          1.  Transformer Turns Ratio
          2.  Total IOUT
          3.  RFB1, RFB2
          4.  Frequency Selection
          5.  Transformer Selection
          6.  Primary Output Capacitor
          7.  Secondary Output Capacitor
          8.  Type III Feedback Ripple Circuit
          9.  Secondary Diode
          10. VCC and Bootstrap Capacitor
          11. Input Capacitor
          12. UVLO Resistors
          13. VCC Diode
        3. Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Ripple Configuration

The LM5018 uses Constant-On-Time (COT) control scheme, in which the on-time is terminated by an on-timer, and the off-time is terminated by the feedback voltage (VFB) falling below the reference voltage (VREF). Therefore, for stable operation, the feedback voltage must decrease monotonically, in phase with the inductor current during the off-time. Furthermore, this change in feedback voltage (VFB) during off-time must be large enough to suppress any noise component present at the feedback node.

Table 7-1 shows three different methods for generating appropriate voltage ripple at the feedback node. Type 1 and Type 2 ripple circuits couple the ripple at the output of the converter to the feedback node (FB). The output voltage ripple has two components:

  1. Capacitive ripple caused by the inductor current ripple charging/discharging the output capacitor.
  2. Resistive ripple caused by the inductor current ripple flowing through the ESR of the output capacitor.

The capacitive ripple is not in phase with the inductor current. As a result, the capacitive ripple does not decrease monotonically during the off-time. The resistive ripple is in phase with the inductor current and decreases monotonically during the off-time. The resistive ripple must exceed the capacitive ripple at the output node (VOUT) for stable operation. If this condition is not satisfied, unstable switching behavior is observed in COT converters, with multiple on-time bursts in close succession followed by a long off-time.

Type 3 ripple method uses Rr and Cr and the switch node (SW) voltage to generate a triangular ramp. This triangular ramp is ac-coupled using Cac to the feedback node (FB). Because this circuit does not use the output voltage ripple, it is ideally suited for applications where low output voltage ripple is required. See the AN-1481 Controlling Output Ripple and Achieving ESR Independence in Constant On-Time (COT) Regulator Designs (SNVA166) for more details for each ripple generation method.

Table 7-1 Ripple Configuration
Equation 5. GUID-A07B95ED-4F37-4C77-8CDE-D35BC9189EF2-low.gif
Equation 6. GUID-F1269C6C-0BAE-4CA0-A9AB-7482B7A503C5-low.gif
Equation 7. GUID-CE1A369F-1FB8-4278-AF03-8EC75172017E-low.gif