SNVS565I November   2008  – August 2015 LM5085 , LM5085-Q1


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings: LM5085
    3. 6.3 ESD Ratings: LM5085-Q1
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Regulation Control Circuit
      2. 7.3.2  On-Time Timer
      3. 7.3.3  Shutdown
      4. 7.3.4  Current Limiting
      5. 7.3.5  Current Limit Off-Time
      6. 7.3.6  VCC Regulator
      7. 7.3.7  PGATE Driver Output
      8. 7.3.8  P-Channel MOSFET Selection
      9. 7.3.9  Soft-Start
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Standby Mode with VIN <4.5 V
      2. 7.4.2 RT Shutdown Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. External Components
        2. Alternate Output Ripple Configurations
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • NGQ|8
  • DGK|8
  • DGN|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

In most applications, the heat sink pad or tab of Q1 is connected to the switch node, i.e. the junction of Q1, L1 and D1. While it is common to extend the PC board pad from under these devices to aid in heat dissipation, the pad size should be limited to minimize EMI radiation from this switching node. If the PC board layout allows, a similarly sized copper pad can be placed on the underside of the PC board, and connected with as many vias as possible to aid in heat dissipation.

The voltage regulation, over-voltage, and current limit comparators are very fast and can respond to short duration noise pulses. Layout considerations are therefore critical for optimum performance. The layout must be as neat and compact as possible with all the components as close as possible to their associated pins. Two major current loops conduct currents which switch very fast, requiring the loops to be as small as possible to minimize conducted and radiated EMI. The first loop is that formed by CIN, Q1, L1, COUT, and back to CIN. The second loop is that formed by D1, L1, COUT, and back to D1. The connection from the anode of D1 to the ground end of CIN must be short and direct. CIN must be as close as possible to the VIN and GND pins, and CVCC must be as close as possible to the VIN and VCC pins.

If the anticipated internal power dissipation of the LM5085 will produce excessive junction temperatures during normal operation, a package option with an exposed pad must be used (HVSSOP-8 or WSON-8). Effective use of the PC board ground plane can help dissipate heat. Additionally, the use of wide PC board traces, where possible, helps conduct heat away from the IC. Judicious positioning of the PC board within the end product, along with the use of any available air flow (forced or natural convection) also helps reduce the junction temperature.

10.2 Layout Example

LM5085 LM5085-Q1 30079366.gifFigure 33. LM5085 Buck Converter Layout Example