SNVS349E February   2005  – August 2016 LM5105

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Start-Up and UVLO
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Power Dissipation Considerations
    2. 9.2 HS Transient Voltages Below Ground
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resource
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
VDD to VSS –0.3 18 V
HB to HS –0.3 18 V
IN and EN to VSS –0.3 VDD + 0.3 V
LO to VSS –0.3 VDD + 0.3 V
HO to VSS HS – 0.3 HB + 0.3 V
HS to VSS(3) −5 100 V
HB to VSS 118 V
RDT to VSS –0.3 5 V
Junction temperature, TJ 150 °C
Storage temperature, Tstg –55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.
(3) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage generally does not exceed –1 V. However, in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD – 15 V. For example, if VDD = 10 V, the negative transients at HS must not exceed –5 V.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM)(1)(2) ±2000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) The human-body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. Pin 2, Pin 3 and Pin 4 are rated at
500 V.

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VDD 8 14 V
HS(1) –1 100 V
HB HS + 8 HS + 14 V
HS Slew rate <50 V/ns
TJ Junction temperature –40 125 °C
(1) In the application the HS node is clamped by the body diode of the external lower N-MOSFET; therefore, the HS voltage generally does not exceed –1 V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than VDD – 15 V. For example, if VDD = 10 V, the negative transients at HS must not exceed –5 V.

6.4 Thermal Information

THERMAL METRIC(1) LM5105 UNIT
DPR (WSON)
10 PINS
RθJA Junction-to-ambient thermal resistance 37.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 36.2 °C/W
RθJB Junction-to-board thermal resistance 14.9 °C/W
ψJT Junction-to-top characterization parameter 0.3 °C/W
ψJB Junction-to-board characterization parameter 15.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 4.4 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

Unless otherwise noted, VDD = HB = 12 V, VSS = HS = 0 V, EN = 5 V, no load on LO or HO, RDT= 100 kΩ(1). Typical limits are for TJ = 25°C, and minimum and maximum limits apply over the operating junction temperature range (–40°C to 125°C).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENTS
IDD VDD quiescent current IN = EN = 0 V 0.34 0.6 mA
IDDO VDD operating current f = 500 kHz 1.65 3 mA
IHB Total HB quiescent current IN = EN = 0 V 0.06 0.2 mA
IHBO Total HB operating current f = 500 kHz 1.3 3 mA
IHBS HB to VSS current, quiescent HS = HB = 100 V 0.05 10 µA
IHBSO HB to VSS current, operating f = 500 kHz 0.1 mA
INPUT IN AND EN
VIL Low-level input voltage threshold 0.8 1.8 V
VIH High-level input voltage threshold 1.8 2.2 V
Rpd Input pulldown resistance pin IN and EN 100 200 500 kΩ
DEAD-TIME CONTROLS
VRDT Nominal voltage at RDT 2.7 3 3.3 V
IRDT RDT pin current limit RDT = 0 V 0.75 1.5 2.25 mA
UNDER VOLTAGE PROTECTION
VDDR VDD rising threshold 6 6.9 7.4 V
VDDH VDD threshold hysteresis 0.5 V
VHBR HB rising threshold 5.7 6.6 7.1 V
VHBH HB threshold hysteresis 0.4 V
BOOT STRAP DIODE
VDL Low-current forward voltage IVDD-HB = 100 µA 0.6 0.9 V
VDH High-current forward voltage IVDD-HB = 100 mA 0.85 1.1 V
RD Dynamic resistance IVDD-HB = 100 mA 0.8 1.5 Ω
LO GATE DRIVER
VOLL Low-level output voltage ILO = 100 mA 0.25 0.4 V
VOHL High-level output voltage ILO = –100 mA,
VOHL = VDD – VLO		 0.35 0.55 V
IOHL Peak pullup current LO = 0 V 1.8 A
IOLL Peak pulldown current LO = 12 V 1.6 A
HO GATE DRIVER
VOLH Low-level output voltage IHO = 100 mA 0.25 0.4 V
VOHH High-level output voltage IHO = –100 mA,
VOHH = HB – HO		 0.35 0.55 V
IOHH Peak pullup current HO = 0 V 1.8 A
IOLH Peak pulldown current HO = 12 V 1.6 A
(1) Minimum and maximum limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).

6.6 Switching Characteristics

Unless otherwise noted, VDD = HB = 12 , VSS = HS = 0 V, no Load on LO or HO(1). Typical limits are for TJ = 25°C, and minimum and maximum limits apply over the operating junction temperature range (–40°C to 125°C).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tLPHL Lower turnoff propagation delay 26 56 ns
tHPHL Upper turnoff propagation delay 26 56 ns
tLPLH Lower turnon propagation delay RDT = 100 k 485 595 705 ns
tHPLH Upper turnon propagation delay RDT = 100 k 485 595 705 ns
tLPLH Lower turnon propagation delay RDT = 10 k 75 105 150 ns
tHPLH Upper turnon propagation delay RDT = 10 k 75 105 150 ns
ten, tsd Enable and shutdown propagation delay 28 ns
DT1, DT2 Dead-time LO OFF to HO ON
and HO OFF to LO ON		 RDT = 100 k 570 ns
RDT = 10 k 80 ns
MDT Dead-time matching RDT = 100 k 50 ns
tR, tF Either output rise or fall time CL = 1000 pF 15 ns
tBS Bootstrap diode turnon or turnoff time IF = 20 mA, IR = 200 mA 50 ns
(1) Minimum and maximum limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
LM5105 20137503.gif Figure 1. LM5105 Input - Output Waveforms
LM5105 20137504.gif Figure 2. LM5105 Switching Time Definitions: TLPLH, TLPHL, THPLH, THPHL
LM5105 20137530.gif Figure 3. LM5105 Enable: Tsd
LM5105 20137531.gif Figure 4. LM5105 Dead-Time: DT

6.7 Typical Characteristics

LM5105 20137510.gif Figure 5. VDD Operating Current vs Frequency
LM5105 20137512.gif Figure 7. Quiescent Current vs Supply Voltage
LM5105 20137516.gif Figure 9. HB Operating Current vs Frequency
LM5105 20137515.gif Figure 11. Diode Forward Voltage
LM5105 20137519.gif Figure 13. Undervoltage Rising Threshold vs Temperature
LM5105 20137521.gif Figure 15. LO & HO Low-Level Output Voltage
vs Temperature
LM5105 20137514.gif Figure 17. Dead-Time vs RT Resistor Value
LM5105 20137527.gif Figure 19. Dead-Time vs Temperature (RT = 100 k)
LM5105 20137511.gif Figure 6. Operating Current vs Temperature
LM5105 20137513.gif Figure 8. Quiescent Current vs Temperature
LM5105 20137517.gif Figure 10. HO & LO Peak Output Current vs Output Voltage
LM5105 20137518.gif Figure 12. Undervoltage Hysteresis vs Temperature
LM5105 20137520.gif Figure 14. LO & HO High-Level Output Voltage
vs Temperature
LM5105 20137522.gif Figure 16. Input Threshold vs Temperature
LM5105 20137526.gif Figure 18. Dead-Time vs Temperature (RT = 10 k)