SNOS760C May   1999  – September 2014 LM7171

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 ±15V DC Electrical Characteristics
    6. 6.6 ±15V AC Electrical Characteristics
    7. 6.7 ±5V DC Electrical Characteristics
    8. 6.8 ±5V AC Electrical Characteristics
    9. 6.9 Typical Performance Characteristics
  7. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Circuit Operation
    3. 7.3 Slew Rate Characteristic
    4. 7.4 Slew Rate Limitation
    5. 7.5 Compensation For Input Capacitance
    6. 7.6 Application Circuit
  8. Power Supply Recommendations
    1. 8.1 Power Supply Bypassing
    2. 8.2 Termination
    3. 8.3 Driving Capacitive Loads
    4. 8.4 Power Dissipation
  9. Layout
    1. 9.1 Layout Guidelines
      1. 9.1.1 Printed Circuit Board and High Speed Op Amps
      2. 9.1.2 Using Probes
      3. 9.1.3 Component Selection and Feedback Resistor
  10. 10Device and Documentation Support
    1. 10.1 Trademarks
    2. 10.2 Electrostatic Discharge Caution
    3. 10.3 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Power Supply Recommendations

8.1 Power Supply Bypassing

Bypassing the power supply is necessary to maintain low power supply impedance across frequency. Both positive and negative power supplies should be bypassed individually by placing 0.01 μF ceramic capacitors directly to power supply pins and 2.2 μF tantalum capacitors close to the power supply pins.

01238511.pngFigure 59. Power Supply Bypassing

8.2 Termination

In high frequency applications, reflections occur if signals are not properly terminated. Figure 60 shows a properly terminated signal while Figure 61 shows an improperly terminated signal.

properly_term_designer_v2.pngFigure 60. Properly Terminated Signal
improperly_terminated_designer.pngFigure 61. Improperly Terminated Signal

To minimize reflection, coaxial cable with matching characteristic impedance to the signal source should be used. The other end of the cable should be terminated with the same value terminator or resistor. For the commonly used cables, RG59 has 75Ω characteristic impedance, and RG58 has 50Ω characteristic impedance.

8.3 Driving Capacitive Loads

Amplifiers driving capacitive loads can oscillate or have ringing at the output. To eliminate oscillation or reduce ringing, an isolation resistor can be placed as shown in Figure 62. The combination of the isolation resistor and the load capacitor forms a pole to increase stability by adding more phase margin to the overall system. The desired performance depends on the value of the isolation resistor; the bigger the isolation resistor, the more damped the pulse response becomes. For LM7171, a 50Ω isolation resistor is recommended for initial evaluation. Figure 63 shows the LM7171 driving a 150 pF load with the 50Ω isolation resistor.

01238512.pngFigure 62. Isolation Resistor Used
to Drive Capacitive Load
dirivng_150_pf_load_designer.pngFigure 63. The LM7171 Driving a 150 pF Load
with a 50 Ω Isolation Resistor

8.4 Power Dissipation

The maximum power allowed to dissipate in a device is defined as:

Equation 2. PD = (TJ(MAX) − TA)/θJA

where

  • PD is the power dissipation in a device
  • TJ(max) is the maximum junction temperature
  • TA is the ambient temperature
  •  RθJA is the thermal resistance of a particular package

For example, for the LM7171 in a SOIC-8 package, the maximum power dissipation at 25°C ambient temperature is 730 mW.

Thermal resistance, R θJA, depends on parameters such as die size, package size and package material. The smaller the die size and package, the higher RθJA becomes. The 8-pin DIP package has a lower thermal resistance (108°C/W) than that of 8-pin SOIC (172°C/W). Therefore, for higher dissipation capability, use an 8-pin DIP package.

The total power dissipated in a device can be calculated as:

Equation 3. PD = PQ + PL

where

  • PQ is the quiescent power dissipated in a device with no load connected at the output. PL is the power dissipated in the device with a load connected at the output; it is not the power dissipated by the load.
  •  PQis the supply current × total supply voltage with no load
  • PL is the output current × (voltage difference between supply voltage and output voltage of the same side of supply voltage)

For example, the total power dissipated by the LM7171 with VS = ±15V and output voltage of 10V into 1 kΩ is

Equation 4. PD= PQ + PL
Equation 5. = (6.5 mA) × (30V) + (10 mA) × (15V − 10V)
Equation 6. = 195 mW + 50 mW
Equation 7. = 245 mW